• The Transactions of the Korean Institute of Electrical Engineers B
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• v.55 no.1
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• pp.47-53
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• 2006

In this paper, a simple scheme compensating for the effect of dc-link ripple voltages on output voltage of two-leg and three-phase PWM inverters is proposed, where single-phase half-bridge PWM convertor and two-leg inverter are used. The voltage at neutral point of the dc-link is controlled so that the upper-half of do-link voltage is equal to the lower-half voltage in average concept. However, the effect of the do-link ripple voltage results in the inverter output voltage and current distortion. This effect can be eliminated by introducing a compensation voltage in switching time calculation. Also, the inverter dead time should be compensated for sinusoidal output waveform. The proposed scheme has been verified by experimental results which were obtained from the V/F constant operation of the induction motor fed by two-leg inverter.

• Journal of Power Electronics
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• v.11 no.5
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• pp.677-687
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• 2011

In this paper a cycloconverter-type high frequency transformer link inverter with a reduced switch count is analyzed and designed. The proposed topology consists of an H-bridge inverter at the transformer's primary side and a cycloconverter with three bidirectional switches at the secondary. All of the switches of the cycloconverter operate in non-resonant zero voltage and zero current switching modes. To overcome a high voltage surge problem resulting from the transformer leakage inductance, phase angle control based on natural commutation is employed. The effectiveness of the proposed inverter is verified by constructing s 750W prototype. Experimentally, the inverter is able to supply a near sinusoidal output voltage with a total harmonic distortion of less than 1%. For comparison, a PSpice simulation of the inverter is also carried out. It was found that the experimental results are in very close agreement with the simulation.

• Journal of Power Electronics
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• v.12 no.5
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• pp.689-698
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• 2012

This paper investigates the effects of applying different input current waveshapes on the performance of a continuous-conduction-mode (CCM) power-factor-correction (PFC) boost pre-regulator. It is found that the output voltage ripple of the pre-regulator can be reduced if the input current is modified to include controlled amount of higher order harmonics. This finding allows us to balance the performance of output regulation and the harmonic current emission when coming to the design of the pre-regulator. An experimental PFC boost pre-regulator prototype is constructed to verify the analysis and show the benefit of the pre-regulator operating with input current containing higher order harmonics.

• Proceedings of the KIPE Conference
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• 2017.07a
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• pp.178-179
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• 2017

Input filter is an essential component in a practical matrix converter (MC) system to generate the sinusoidal input currents. However, the input filter causes a displacement angle between the input current of MC and the source current. In this paper, we investigate the input filter design for MCs by considering the displacement angles of the input current and the input voltage to guarantee high input power factor (IPF) operation as well as low input current harmonic contents. Simulation results are provided to validate the input filter design with near unity input power factor and low total harmonic distortion (THD) of the input current.

• Journal of Power Electronics
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• v.10 no.4
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• pp.428-433
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• 2010

This paper proposes a harmonics reduction technique for the input currents of three phase PWM converters. The quality of the phase angle information on the utility voltage connected to the PWM converters affects their control performance. Under a distorted utility voltage, the extracted phase angle based on the synchronous reference frame PLL method is distorted. This causes large harmonics in the input currents of a PWM converter. In this paper, a harmonics reduction method that makes the input currents in the PWM converter sinusoidal even under distorted utility conditions is proposed. By the proposed method, without additional hardware, the THD (Total Harmonic Distortion) of the input currents can be readily limited to below 5% which is the harmonic current requirements of IEEE std. 519. Its validity is verified by simulations and experimental results.

• Proceedings of the KIPE Conference
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• 2012.07a
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• pp.232-233
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• 2012

This paper presents an effective control scheme for an electric vehicle battery charger where a symmetrical bridgeless power factor-corrected converter and a buck converter are cascaded. Both converters have been popular in industries because of their high efficiency, low cost, and compact size, hence combining these converters makes the overall battery charging system strongly efficient. Moreover, this charger topology can operate at universal input voltage and attain a desired battery current and voltage without ripple. In order to achieve a unity input power factor and zero input current harmonic distortion, the proposed control scheme adopts duty ratio feed-forward control technique in both current and voltage control loop. Additionally, in the current loop, its reference is created by a phase-locked loop (PLL) block, leading to a pure sinusoidal input current although the input voltage waveform is being distorted. The feasibility and practical value of the proposed approach are verified by simulation and experiment with an 110V/60Hz ac line input and 1.5kW-72V dc output of the battery charging system.

• Proceedings of the KIEE Conference
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• 1995.07a
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• pp.268-270
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• 1995

This paper proposes a novel PWM technique for a three phase current fad type converters. A minor loop compensation method is introduced to compensate leading current and to minimize input line current (Iu) distortion resulting from the resonance between AC filter capacitor and source inductance of power system. This PWM converter has excellent characterics as next. The control system is simply designed, and the operation with unity power factor can be easily obtained by automatic compensating the leading current of the filter circuit. Also. the three phase sinusoidal input current can be obtained.

• Proceedings of the KIEE Conference
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• 1995.07a
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• pp.237-239
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• 1995

The inverter for UPS system is required to satisfy pure sinusoidal output voltage with very low THD(Total Harmonic distortion). This paper proposes a TMS320c31 digital signal processor based predictive instantaneous control scheme of inverter. The proposed scheme is able to satisfy the conditions; high capability, high efficiency, low audible noise and robustness of inverter. The transient state characteristics of proposed inverter has been improved. in case of power failure or recovery, nonlinear load, sudden load change or parameters variations. Finally, the performance of the proposed inverter is shown and discussed by simulation and experiment.

• Journal of Power Electronics
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• v.17 no.4
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• pp.983-990
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• 2017

This paper proposes a model predictive control based on the discrete Lyapunov function to improve the performance of power electronic converters. The proposed control technique, based on the finite control set model predictive control (FCS-MPC), defines a cost function for the control law which is determined under the Lyapunov stability theorem with a control error compensation. The steady state and dynamic performance of the proposed control strategy has been tested under a single phase AC/DC voltage source rectifier (S-VSR). Experimental results demonstrate that the proposed control strategy not only offers global stability and good robustness but also leads to a high quality sinusoidal current with a reasonably low total harmonic distortion (THD) and a fast dynamic response under linear loads.

• Journal of Power Electronics
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• v.16 no.5
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• pp.1964-1980
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• 2016

This paper presents a new simplified harmonics extraction algorithm based on the synchronous reference frame (SRF) for an indirect current controlled (ICC) three-level neutral point diode clamped (NPC) inverter-based shunt active power filter (SAPF). The shunt APF is widely accepted as one of the most effective current harmonics mitigation tools due to its superior adaptability in dynamic state conditions. In its controller, the SRF algorithm which is derived based on the direct-quadrature (DQ) theory has played a significant role as a harmonics extraction algorithm due to its simple implementation features. However, it suffers from significant delays due to its dependency on a numerical filter and unnecessary computation workloads. Moreover, the algorithm is mostly implemented for the direct current controlled (DCC) based SAPF which operates based on a non-sinusoidal reference current. This degrades the mitigation performances since the DCC based operation does not possess exact information on the actual source current which suffers from switching ripples problems. Therefore, three major improvements are introduced which include the development of a mathematical based fundamental component identifier to replace the numerical filter, the removal of redundant features, and the generation of a sinusoidal reference current. The proposed algorithm is developed and evaluated in MATLAB / Simulink. A laboratory prototype utilizing a TMS320F28335 digital signal processor (DSP) is also implemented to validate effectiveness of the proposed algorithm. Both simulation and experimental results are presented. They show significant improvements in terms of total harmonic distortion (THD) and dynamic response when compared to a conventional SRF algorithm.