• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2004년도 하계학술대회 논문집 Vol.5 No.2
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• pp.1033-1036
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• 2004

Si nanocrystallites thin films on p-type (100) Si substrate have been fabricated by pulsed laser deposition using a Nd:YAG laser. After deposition, samples were annealed at the temperatures of 400 to $800^{\circ}C$. Hydrogen passivation was then performed in the forming gas (95% $N_2$ + 5% $H_2$) for 1 hr. Strong violet-indigo photoluminescence has been observed at room temperature from nitrogen ambient-annealed Si nanocrystallites. The variation of photoluminescence (PL) Properties of Si nanocrystallites thin films has been investigated depending on annealing temperatures with hydrogen passivation. From the results of PL, Fourier transform infrared (FTIR), and high-resolution transmission electron microscopy (HRTEM) measurements, it is observed that the origin of violet-indigo PL from the nanocrystalline silicon in the silicon oxide film is related to the quantum size effect of Si nanocrystallites and oxygen vacancies in the SiOx(x : 1.6-1.8) matrix affects the emission intensity.

• 한국결정성장학회지
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• 제14권1호
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• pp.1-5
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• 2004

Carbon nanofilaments were formed on silicon substrate via microwave plasma-enhanced chemical vapor deposition method. The structure of carbon nanofilaments was identified as the carbon nanofibers. The extent of carbon nanofibers growth and the diameters of carbon nanofibers increased with increasing the total pressure. The growth direction of carbon nanofibers was horizontal to the substrate. Laterally grown carbon nanofibers showed the semiconductor electrical characteristics.

• 한국표면공학회지
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• 제50권5호
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• pp.352-359
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• 2017

The growth of nanocrystalline diamond films on a p-type poly silicon substrate was studied using microwave plasma chemical vapor deposition method. A 6 mm thick poly silicon plate was mirror polished and scratched in an ultrasonic bath containing slurries made of 30 cc ethanol and 1 gram of diamond powders having different sizes between 5 and 200 nm. Upon diamond deposition, the specimen scratched in a slurry with the smallest size of diamond powder exhibited the highest diamond particle density and, in turn, fastest diamond film growth rate. Diamond deposition was carried out applying different DC bias voltages (0, -50, -100, -150, -200 V) to the substrate. In the early stage of diamond deposition up to 2 h, the effect of voltage bias was not prominent probably because the diamond nucleation was retarded by ion bombardment onto the substrate. After 4 h of deposition, the film growth rate increased with the modest bias of -100 V and -150 V. With a bigger bias condition(-200 V), the growth rate decreased possibly due to the excessive ion bombardment on the substrate. The film grown under -150V bias exhibited the lowest contact angle and the highest surface roughness, which implied the most hydrophilic surface among the prepared samples. The film growth rate increased with the apparent activation energy of 21.04 kJ/mol as the deposition temperature increased in the range of $300{\sim}600^{\circ}C$.

• 한국신재생에너지학회:학술대회논문집
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• 한국신재생에너지학회 2005년도 제17회 워크샵 및 추계학술대회
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• pp.561-566
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• 2005

Polycrystalline silicon films were deposited using hot wire CVD (HWCVD). The deposition of silicon thin films was approached by the theory of charged clusters (TCC). The TCC states that thin films grow by self-assembly of charged clusters or nanoparticles that have nucleated in the gas phase during the normal thin film process. Negatively charged clusters of a few nanometer in size were captured on a transmission electron microscopy (TEM) grid and observed by TEM. The negatively charged clusters are believed to have been generated by ion-induced nucleation on negative ions, which are produced by negative surface ionization on a tungsten hot wire. The electric current on the substrate carried by the negatively charged clusters during deposition was measured to be approximately $-2{\mu}A/cm^2$. Silicon thin films were deposited at different $SiH_4$ and $H_2$ gas mixtures and filament temperatures. The crystalline volume fraction, grain size and the growth rate of the films were measured by Raman spectroscopy, X-ray diffraction and scanning electron microscopy. The deposit ion behavior of the si1icon thin films was related to properties of the charged clusters, which were in turn controlled by the process conditions. In order to verify the effect of the charged clusters on the growth behavior, three different electric biases of -200 V, 0 V and +25 V were applied to the substrate during the process, The deposition rate at an applied bias of +25 V was greater than that at 0 V and -200 V, which means that the si1icon film deposition was the result of the deposit ion of charged clusters generated in the gas phase. The working pressures had a large effect on the growth rate dependency on the bias appled to the substrate, which indicates that pressure affects the charging ratio of neutral to negatively charged clusters. These results suggest that polycrystalline silicon thin films with high crystalline volume fraction and large grain size can be produced by control1ing the behavior of the charged clusters generated in the gas phase of a normal HWCVD reactor.

• 한국세라믹학회지
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• 제28권6호
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• pp.429-436
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• 1991

Silicon carbide has been grown by a chemical vapor deposition (CVD) technique using CH3SiCl3 and H2 gaseous mixture onto a graphite substrate. Based on the thermodynamic equilibrium studies and the suggestion that the deposition rate of SiC is controlled by surface reaction theoretical kinetic equation for CVD of silicon carbide has been proposed. The proposed theoretical kinetic equation for CVD of silicon carbide agreed well with the experimental results for the variation of the deposition rate as a function of the partial pressure of reactant gases. The Vikers microhardness of the SiC layer was about 3000∼3400 kg/$\textrm{mm}^2$ at room temperature.

• 대한전기학회논문지:전기물성ㆍ응용부문C
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• 제53권5호
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• pp.237-241
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• 2004

Amorphous silicon (a-Si) films are used in a broad range of solar cell, flat panel display, and sensor. Because of the greater ease of deposition and lower processing temperature, thin films are widely used for thin film transistors (TFTs). However, they have lower stability under the exposure of visible light and because of their low field effect mobility ($\mu$$_{FE}$ ) , less than 1 c $m^2$/Vs, they require a driving IC in the external circuits. On the other hand, polycrystalline silicon (poly-Si) thin films have superiority in $\mu$$_{FE}$ and optical stability in comparison to a-Si film. Many researches have been done to obtain high performance poly-Si because conventional methods such as excimer laser annealing, solid phase crystallization and metal induced crystallization have several difficulties to crystallize. In this paper, a new crystallization process using a molybdenum substrate has been proposed. As we use a flexible substrate, high temperature treatment and roll-to-roll process are possible. We have used a high temperature process above 75$0^{\circ}C$ to obtain poly-Si films on molybdenum substrates by a rapid thermal annealing (RTA) of the amorphous silicon (a-Si) layers. The properties of high temperature crystallized poly-Si studied, and poly-Si has been used for the fabrication of TFT. By this method, we are able to achieve high crystal volume fraction as well as high field effect mobility.

• Journal of Information Display
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• 제10권3호
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• pp.117-120
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• 2009

A new crystallization method for amorphous silicon, called selective area heating (SAH), was proposed. The purpose of SAH is to improve the reliability of amorphous silicon films with extremely low thermal budgets to the glass substrate. The crystallization time shortened from that of the conventional solid-phase crystallization method. An isolated thin heater for SAH was fabricated on a quartz substrate with a Pt layer. To investigate the crystalline properties, Raman scattering spectra were used. The crystalline transverse optic phonon peak was at about 519 $cm^{-1}$, which shows that the films were crystallized. The effect of the crystallization time on the varying thickness of the $SiO_2$ films was investigated. The crystallization area in the 400nm-thick $SiO_2$ film was larger than those of the $SiO_2$ films with other thicknesses after SAH at 16 W for 2 min. The results show that a $SiO_2$ capping layer acts as storage layer for thermal energy. SAH is thus suggested as a new crystallization method for large-area electronic device applications.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1998년도 하계학술대회 논문집 D
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• pp.1333-1336
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• 1998

Hydrogenated amorphous silicon(a-Si:H) films which were deposited by plasma enhanced chemical deposition(PECVD) have been recrystallized by the two-step rapid thermal annealing(RTA) employing the halogen lamp. The a-Si:H films evolve hydrogen explosively during the high temperature crystallzation step. In result, the recrystallized polycrystalline silicon(poly-Si) films have poor surface morphology. In order to avoid the hydrogen evolution, the films have undergone the dehydrogenation step prior to the crystallization step Before the RTA process, the active area of thin film transistors (TFT's) was patterned. The prepatterning of the a-Si:H active islands may reduce thermal damage to the glass substrate during the recrystallization. The computer generated simulation shows the heat propagation from the a-Si:H islands into the glass substrate. We have fabricated the poly-Si TFT's on the silicon wafers. The maximun ON/OFF current ratio of the device was over $10^5$.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1996년도 하계학술대회 논문집 C
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• pp.1421-1423
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• 1996

In this study, the effect of solar cell cover glass on the solar cell performance is evaluated. Silicon solar cell (active area:4*6cm, efficiency:12.6% at AMO condition) is used for this study. ITO(Indium tin Oxide) film thickness of the ITO/AR/substrate glass/solar cell structure samples are $40{\AA}$, $60{\AA}$, $160{\AA}$, $240{\AA}$ respectively. The solar cell maximum output power on the stacking structure variations showed 465mW in the AR/ITO/substrate glass/solar cell, and minimum output power showed 403mW in the AR/substrate glass/solar cell. The maximum output power of the solar cell on the ITO thickness variations of the ITO/AR/substrate glass/solar cell showed 460mW at $40{\AA}$ then decrease output power as ITO thickness increase. For environment tests, all samples are exposed UV light in the vacuum chanber. The output power degradation of AR(UVR)/substrate glass/solar cell stacking structure is small compared with ITO/AR(UVR)/substrate glass/solar cell stacking structure.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2009년도 제38회 동계학술대회 초록집
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• pp.145-145
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• 2010

반도체 소자의 크기가 수십 나노미터 영역으로 줄어들면서, 메모리 소자 또한 미세화를 위해 새로운 기술을 요구하고 있다. 1T DRAM은 하나의 트랜지스터와 하나의 캐패시터 구조를 가진 기존의 DRAM과 달리, 캐패시터 영역을 없애고 하나의 트랜지스터만으로 동작하기 때문에 복잡한 공정과정을 줄일 수 있으며 소자집적화에도 용이하다. 또한 SOI (Silicon-On-Insulator) 기판을 사용함으로써 단채널효과와 누설전류를 감소시키고, 소비전력이 적다는 이점을 가지고 있다. 1T DRAM은 floating body effect에 의해 상부실리콘의 중성영역에 축적된 정공을 이용하여 정보를 저장하게 된다. floating body effect를 발생시키기 위해 본 연구에서는 SOI 기판을 사용한 MOSFET을 사용하였는데, SOI 기판은 불순물 도핑농도에 따라 상부실리콘의 공핍층 두께가 결정된다. 실제로 불순물을 $10^{15}cm^{-3}$ 정도 도핑을 하게 되면 완전공핍된 SOI 구조가 된다. 이는 subthreshold swing값이 작고 저전압, 저전력용 회로에 적합한 특성을 보이기 때문에 부분공핍된 SOI 구조보다 우수한 특성을 가진다. 하지만, 상부실리콘의 중성영역이 완전히 공핍되어 정공이 축적될 공간이 존재하지 않게 된다. 이를 해결하기 위해 기판에 전압을 인가 후 kink effect를 확인하여, 메모리 소자로서의 구동 가능성을 알아보았다. 본 연구에서는 상부실리콘의 두께가 감소함에 따라 1T DRAM의 메모리 특성변화를 관찰하고자, TMAH (Tetramethy Ammonuim Hydroxide) 용액을 이용한 습식식각을 통해 상부실리콘의 두께가 각기 다른 소자를 제작하였다. 제작된 소자는 66 mv/dec의 우수한 subthreshold swing 값을 나타내며 빠른 스위칭 특성을 보였다. 또한 kink effect가 발생하는 최적의 조건을 찾고, 상부실리콘의 두께가 메모리 소자의 쓰기/소거 동작의 경향성에 미치는 영향을 평가하였다.