• Geophysics and Geophysical Exploration
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• v.6 no.3
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• pp.126-133
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• 2003

High-resolution shallow marine seismic surveys have been carried out for the resources exploration, engineering applications and Quaternary mapping. To improve the resolution of subsurface structure image, multichannel digital technique has been applied. The quality of the image depends on the vertical and horizontal resolution and signal to noise (S/N) ratio which are associated with the data acquisition parameters such as sample interval, common midpoint (CMP) interval and CMP fold. To understand the effect of the acquisition parameters, a test survey was carried out off Yeosu and the acquired data were analyzed. A 30 $in^3$ small air gun was used as a seismic source and 8 channel streamer cable with a 5 m group interval was used as a receiver. The data were digitally recorded with a shot interval of 2 s and sample interval of 0.1 ms. The acquired data were resampled with various sample intervals, CMP intervals and CMP folds. The resampled data were processed, plotted as seismic sections and compared each other. The analysis results show that thin bed structure with ${\~}1m$ thickness and ${\~}6^{\circ}$ slope can be imaged with good resolution and continuity and low noise using the acquisition parameters with a sample interval shorter than 0.2 ms, CMP interval shorter than 2.5 m and CMP fold more than 4. Because seismic resolution is associated with the acquisition parameters, the quality of the subsurface structure can be imaged successfully using suitable and optimum acquisition parameters.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.08a
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• pp.345-345
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• 2012

최근 의료산업에서는 고해상도 및 동영상 구현이 가능한 직접 방식의 X-선 검측센서에서 X-ray 흡수효율이 좋은 반도체 센서(CdTe, CdZnTe 등)와 성숙된 기술, 집적효율이 뛰어난 CMOS 공정을 이용한 제품을 출시하여 대면적화 및 고집적화가 가능하게 되어 응용분야가 점차 확대되고 있는 추세이다. 하지만 이 역시 고 성능의 X-선 동영상 구현을 위해서는 고 해상도 문제, 검출효율 문제, 대면적화의 어려움이 있다. 기존의 X-선 광 도전층의 증착은 증착 속도와 박막 품질에서 우수한 Evaporation 법이 사용되고 있다. 한편, 대면적에 균일한 박막형성이 가능하기 때문에 양산성에서 우월성을 가지는 sputtering법의 경우, 밀도가 높은 소결체 타겟의 제조가 힘들뿐만 아니라 증착 속도가 낮아 장시간 증착 시 낮은 소결밀도로 인한 타겟 Particle 영향으로 인해서 대 면적에 고품질의 박막을 형성하기가 어렵다. 하지만 최근 소결체 타겟 제조기술 발달과 함께, 대면적화와 장시간 증착에 대한 어려움이 해결되고 있어 sputtering 법을 이용한 고품질 박막 제조 기술의 연구가 시급한 실정이다. 본 연구에서는 $50{\times}50$ mm 크기의 non-alkali 유리기판(Corning E2000) 위에 Evaporation과 RF magnetron sputtering을 사용하여 다양한 기판온도 (RT, 100, 200, 300, $350^{\circ}C$)에서 $1{\mu}m$의 두께로 CdTe 박막을 증착하였다. RF magnetron sputtering의 경우 CdTe 단일 타겟(50：50 at%)을 사용하였으며 Base pressure는 약 $5{\times}10^{-6}$ Torr 이하까지 배기하였고, Working pressure는 약 $7.5{\times}10^{-3}$ Torr에서 증착하였다. 시편과 기판 사이의 거리는 70 mm이며 RF 파워는 150 W로 유지하였다. CdTe 박막의 미세구조는 X-ray diffraction (XRD, BRUKER GADDS) 및 Field Emission Scanning Electron Microscopy (FE-SEM, Hitachi)를 사용하여 측정하였다. 또한, 조건별 박막의 조성은 Energy Dispersive X-ray Spectroscopy (EDS, Horiba, 7395-H)을 사용하여 평가하였다. X-선 동영상 장치의 구현을 위해서는 CdTe 다결정 박막의 높은 흡수효율, 전하수집효율 및 SNR (Signal to Noise Ratio) 등의 물성이 요구된다. 이러한 물성을 나타내기 위해서는 CdTe 박막의 높은 결정성이 중요하다. Evaporation과 RF magnetron sputtering로 제작된 CdTe 박막은 공정 온도가 증가함에 따라 기판상에 도달하는 스퍼터 원자의 에너지 증가로 인해서 결정립이 성장한 것을 확인할 수 있었다. 따라서 CdTe 박막이 직접변환방식 고감도 X-ray 검출기 광도 전층 역할을 수행할 수 있을 것으로 기대된다.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.12 s.354
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• pp.55-64
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• 2006

This work proposes a calibration-free 14b 70MS/s 0.13um CMOS ADC for high-performance integrated systems such as WLAN and high-definition video systems simultaneously requiring high resolution, low power, and small size at high speed. The proposed ADC employs signal insensitive 3-D fully symmetric layout techniques in two MDACs for high matching accuracy without any calibration. A three-stage pipeline architecture minimizes power consumption and chip area at the target resolution and sampling rate. The input SHA with a controlled trans-conductance ratio of two amplifier stages simultaneously achieves high gain and high phase margin with gate-bootstrapped sampling switches for 14b input accuracy at the Nyquist frequency. A back-end sub-ranging flash ADC with open-loop offset cancellation and interpolation achieves 6b accuracy at 70MS/s. Low-noise current and voltage references are employed on chip with optional off-chip reference voltages. The prototype ADC implemented in a 0.13um CMOS is based on a 0.35um minimum channel length for 2.5V applications. The measured DNL and INL are within 0.65LSB and l.80LSB, respectively. The prototype ADC shows maximum SNDR and SFDR of 66dB and 81dB and a power consumption of 235mW at 70MS/s. The active die area is $3.3mm^2$.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.44 no.2
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• pp.6-14
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• 2007

In this paper, we propose and observe the Adaptive Modulation system with optimal Turbo Coded V-BLAST (Vertical-Bell-lab Layered Space-Time) technique that is applied the extrinsic information from MAP (Maximum A Posteriori) Decoder in decoding Algorithm of V-BLAST: ordering and slicing. The extrinsic information is used by a priori probability and the system decoding process is composed of the Main Iteration and the Sub Iteration. And comparing the proposed system with the Adaptive Modulation system using conventional Turbo Coded V-BLAST technique that is simply combined V-BLAST with Turbo Coding scheme, we observe how much throughput performance has been improved. In addition, we observe the proposed system using STD (Selection Transmit Diversity) scheme. As a result of simulation, Comparing with the conventional Turbo Coded V-BLAST technique with the Adaptive Modulation systems, the optimal Turbo Coded V-BLAST technique with the Adaptive Modulation systems has better throughput gain that is about 350 Kbps in 11 dB SNR range. Especially, comparing with the conventional Turbo Coded V-BLAST technique using 2 transmit and 2 receive antennas, the proposed system with STD (Selection Transmit Diversity) scheme show that the improvement of maximum throughput is about 1.77 Mbps in the same SNR range.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.5A
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• pp.490-496
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• 2007

This paper describes the design and implementation of an integrated LTCC front-end module for the IEEE802.11a WLAN applications by performing the behavioral-level simulation using measurement-based behavioral model. To meet the IEEE802.11a WLAN standard, a system transmitting 1024 symbols through 64-QAM process at the rate of 54Mbps should be implemented and nonlinear properties are confirmed by simulations of ACPR and EVM in this circumstance. The right offsets of ACPR which are 30MHz, 20MHz, and 11MHz distant from the center frequency of 5.8GHz are 49.36dBc, 36.90dBc, and 24.58dBc, respectively. The left offsets are 50.14dBc, 30.04dBc, and 28.85dBc, respectively and EVM is 2.94%. The size of the module implemented with LTCC five-layer substrates is $13.4mm{\times}14.2mm$. The measured characteristics of the transmitter show P1dB of 16.2dBm and power gain of 16.73dB. Those of the receiver exhibit the small signal gain of 16.24dB and noise figure of 7.83dB.

• Korean Journal of Biological Psychiatry
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• v.15 no.4
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• pp.288-296
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• 2008

Objectives : We investigated the association of Val108/158Met polymorphism on catechol-O-methyl transferase(COMT) gene with smooth pursuit eye movement(SPEM) abnormality in Korean schizophrenia patients. Methods : We measured SPEM in 217 Korean schizophrenia patients(male 116, female 101) and divided them into two groups, one was a good SPEM function group and the other was a poor SPEM function group. Then we analyzed Val108/158Met polymorphism on COMT gene. We compared the differences of genotype and allele distributions of the polymorphism on COMT gene between the two groups. Results : The natural logarithm value of signal/noise ratio(Ln S/N ratio) of the good SPEM function group was $4.39{\pm}0.33$(mean${\pm}$s.d.) and that of poor SPEM function group was $3.17{\pm}0.71$. There were no statistically significant differences of age and male/female ratio between the two groups. There were no significant differences of genotype or allele distributions of the Val108/158Met polymorphism on COMT gene between the two schizophrenic groups. Conclusions : The results suggest that Val108/158Met polymorphism on COMT gene is not related to SPEM function abnormality in schizophrenia.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.36 no.12B
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• pp.1565-1573
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• 2011

In this paper, we present a MIMO-OFDM broadband power line communication (BPLC) for Smart Grid and its associated applications and analyze its performance over the 3-phase 4-wire power line channels. For practical BPLC system simulation, we adopt the statistical power line fading channel model instead of the existing deterministic fading channel models (Zimmermann model, MTL model, and so on). In this paper, we implement $2{\times}2$ and $3{\times}3$ MIMO schemes using 3-phase 4-wire power lines. We investigate the capacity loss and BER performance of the proposed MIMO system by considering the effect of cross-talk between antenna paths. We choose space-frequency coding in order to reduce frequency interference between subcarriers and employ maximum ratio combining (MRC) that achieves both multiple antenna path diversity gain and multiple fading path diversity gain. We evaluate the proposed system performance through computer simulation in terms of the impulse noise index and the capacity loss ratio and compare the different signal combining schemes including MRC, equal gain combing (EGC), and selection combining (SC).

• Proceedings of the Korean Vacuum Society Conference
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• 2013.08a
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• pp.210.2-210.2
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• 2013

현재 국내의 상용화된 디지털 방식 X-선 영상장치에서 간접변환방식은 대부분 CsI를 사용하고 있으며, X-선 흡수에 의해 전기적 신호를 발생시키는 직접변환방식은 Amorphous Selenium(a-Se)을 사용한다. a-Se은 진공 중에 녹는점이 낮아 증착시 substrate의 온도에 따라 민감한 변화를 보인다. 본 연구에서는 간접변환방식에 비해 높은 영상의 질을 획득할 수 있는 직접변환방식의 a-Se기반 X-선 검출기 제작 시 substrate에 인가된 온도에 따른 특성을 연구하여 최적화 된 substrate의 온도를 알고자 한다. 본 실험에서는 glass에 투명한 전극물질인 Indium Tin Oxide (ITO)가 electrode로 형성된 substrate를 사용하였으며 그 상단에 a-Se을 Physical Vapor Deposition (PVD)방식을 거쳐 X-선 검출기 샘플을 제작하였다. PVD 공정 시 네 개의 보트에 a-Se 시료를 각각 100g씩 총 400g을 넣고, $5{\times}10-5Torr$까지 진공도를 낮추었다. 보트의 온도는 $270^{\circ}C$에서 40분 $290^{\circ}C$에서 90분으로 온도를 인가하여 a-Se을 기화시켜 증착하였다. 증착 시 substrate 온도를 각각 $20^{\circ}C$, $40^{\circ}C$, $60^{\circ}C$, $70^{\circ}C$ 네 종류로 나누어 실험을 진행하였다. 끝으로 증착된 a-Se 상단에 Au를 PVD방식으로 electrode를 형성시켜 a-Se기반의 X-선 검출기 샘플 제작을 완료하였다. 제작된 a-Se기반의 X-선 검출기 샘플의 두께는 80에서 $85{\mu}m$로 온도에 따른 차이가 없었다. 이후에 전기적 특성을 평가하기위해 electrometer와 oscilloscope를 이용하여 Dark current와 Sensitivity를 측정하여 Signal to Noise Ratio(SNR)로 도출하였으며 Scanning Electron Microscope(SEM) 표면 uniformity를 관찰하였다. 또한 제작된 a-Se기반 X-선 검출기 샘플의 hole collection 성능을 확인하고자 mobility를 측정하였다. 측정결과 a-Se의 work function을 고려한 $10V/{\mu}m$기준에서 70kV, 100mA, 0.03sec의 조건의 X-선을 조사 하였을 때 Sensitivity는 세 종류의 검출기 샘플이 15nC/mR-cm2에서 18nC/mR-cm2으로 비슷한 양상을 나타내었지만, substrate온도가 $70^{\circ}C$때의 샘플은 10nC/mR-cm2이하로 저감됨을 알 수 있었다. 그리고 substrate온도 $60^{\circ}C$에서 제작된 검출기 샘플의 전기적 특성이 SNR로 환산 시, 15.812로 가장 우수한 전기적 특성을 나타내어 최적화 된 온도임을 알 수 있었다. SEM촬영 시 온도상승에 따라 표면 uniformity가 우수하였으며, Mobility lifetime에서는 $60^{\circ}C$에서 제작된 검출기 샘플이 deep trap 수치가 높아 hole이 $0.04584cm2/V{\cdot}sec$로 $0.00174cm2/V{\cdot}sec$의 electron보다 26.34배가량 빠른 것을 확인하였다. 본 연구를 통해 a-Se증착 시, substrate에 인가된 온도는 균일한 박막의 형성 및 표면구조에 영향을 미치며 온도가 증가할수록 안정적인 전기적 특성을 나타내지만 $70^{\circ}C$이상일 시, a-Se층의 결정화가 생겨 deep trap을 발생시켜 전기적 특성이 저하됨을 확인 할 수 있었다. 따라서 증착 시의 substrate의 온도 최적화는 a-Se기반 X-선 검출기의 안전성 및 성능향상을 위해 불가피한 요소가 된다고 사료된다.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.11 s.353
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• pp.37-47
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• 2006

This work proposes a 10b 25MS/s $0.8mm^2$ 4.8mW 0.13um CMOS A/D Converter (ADC) for high-performance wireless communication systems such as DVB, DAB and DMB simultaneously requiring low voltage, low power, and small area. A two-stage pipeline architecture minimizes the overall chip area and power dissipation of the proposed ADC at the target resolution and sampling rate while switched-bias power reduction techniques reduce the power consumption of analog amplifiers. A low-power sample-and-hold amplifier maintains 10b resolution for input frequencies up to 60MHz based on a single-stage amplifier and nominal CMOS sampling switches using low threshold-voltage transistors. A signal insensitive 3-D fully symmetric layout reduces the capacitor and device mismatch of a multiplying D/A converter while low-noise reference currents and voltages are implemented on chip with optional off-chip voltage references. The employed down-sampling clock signal selects the sampling rate of 25MS/s or 10MS/s with a reduced power depending on applications. The prototype ADC in a 0.13um 1P8M CMOS technology demonstrates the measured DNL and INL within 0.42LSB and 0.91LSB and shows a maximum SNDR and SFDR of 56dB and 65dB at all sampling frequencies up to 2SMS/s, respectively. The ADC with an active die area if $0.8mm^2$ consumes 4.8mW at 25MS/s and 2.4mW at 10MS/s at a 1.2V supply.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.8
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• pp.253-263
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• 2013

Frequency Scanning Interferometry(FSI) system, one of the most promising optical surface measurement techniques, generally results in superior optical performance comparing with other 3-dimensional measuring methods as its hardware structure is fixed in operation and only the light frequency is scanned in a specific spectral band without vertical scanning of the target surface or the objective lens. FSI system collects a set of images of interference fringe by changing the frequency of light source. After that, it transforms intensity data of acquired image into frequency information, and calculates the height profile of target objects with the help of frequency analysis based on Fast Fourier Transform(FFT). However, it still suffers from optical noise on target surfaces and relatively long processing time due to the number of images acquired in frequency scanning phase. 1) a Polarization-based Frequency Scanning Interferometry(PFSI) is proposed for optical noise robustness. It consists of tunable laser for light source, ${\lambda}/4$ plate in front of reference mirror, ${\lambda}/4$ plate in front of target object, polarizing beam splitter, polarizer in front of image sensor, polarizer in front of the fiber coupled light source, ${\lambda}/2$ plate between PBS and polarizer of the light source. Using the proposed system, we can solve the problem of fringe image with low contrast by using polarization technique. Also, we can control light distribution of object beam and reference beam. 2) the signal processing acceleration method is proposed for PFSI, based on parallel processing architecture, which consists of parallel processing hardware and software such as Graphic Processing Unit(GPU) and Compute Unified Device Architecture(CUDA). As a result, the processing time reaches into tact time level of real-time processing. Finally, the proposed system is evaluated in terms of accuracy and processing speed through a series of experiment and the obtained results show the effectiveness of the proposed system and method.