• JSTS:Journal of Semiconductor Technology and Science
• /
• 제16권2호
• /
• pp.204-209
• /
• 2016

The analyses on self-heating effect in 7 nm node non-rectangular Bulk FinFET device were performed using 3D device simulation with consideration to contact via and pad. From self-heating effect simulation, the position where the maximum lattice temperature occurs in Bulk FinFET device was investigated. Through the comparison of thermal resistance at each node, main heat transfer path in Bulk FinFET device can be determined. Self-heating effect with device parameter and operation temperature was also analyzed and compared. In addition, the impact of interconnects which are connected between the device on self-heating effect was investigated.

• JSTS:Journal of Semiconductor Technology and Science
• /
• 제12권3호
• /
• pp.370-376
• /
• 2012

In this work, design considerations for high-performance silicon photodetector are thoroughly investi- gated. Besides the critical dimensions of device, guidelines for process architecture are suggested. Abiding by those criteria for improving both direct-current (DC) and alternating-current (AC) perfor- mances, a high-speed low-operation power silicon photodetector based on p-i-n structure for optical interconnect has been designed by device simulation. An $f_{-3dB}$ of 80 GHz at an operating voltage of 1 V was obtained.

• 한국시뮬레이션학회논문지
• /
• 제14권4호
• /
• pp.55-68
• /
• 2005

The advancement in semiconductor technology is leading toward smaller critical dimension designs and larger wafer manufactures. Due to such phenomena, semiconductor industry is in need of an accurate control of the process. Photolithography is one of the key processes where the pattern of each layer is formed. In this process, precise superposition of the current layer to the previous layer is critical. Therefore overlay parameters of the semiconductor photolithography process is targeted for this research. The complex relationship among the input parameters and the output metrologies is difficult to understand and harder yet to model. Because of the superiority in modeling multi-nonlinear relationships, neural networks is used for the simulator modeling. For training the neural networks, conjugate gradient method is employed. An experiment is performed to evaluate the performance among the proposed neural network simulator, stepwise regression model, and the currently practiced prediction model from the test site.

• 한국광학회지
• /
• 제29권1호
• /
• pp.32-39
• /
• 2018

The impact of the amplified spontaneous emission (ASE) on the gain recovery time of a bulk semiconductor optical amplifier (SOA) is investigated. The gain-recovery time is obtained by determining the time evolution of the gain, carrier density, and ASE in an SOA, after the propagation of a short pump pulse and continuous-wave (CW) probe of gain dynamics. In the simulation, a wide-band-semiconductor model, which can be characterized by the material gain coefficient over a wide wavelength range, is used, because the gain bandwidth of a practical SOA is very wide. The pump pulse and counterpropagating CW probe field are considered in the simulation, with the ASE noise spectrum equally divided.

• 반도체디스플레이기술학회지
• /
• 제21권3호
• /
• pp.130-134
• /
• 2022

An anti-reflective coating is used to improve the performance of the solar cell. The anti-reflective coating changes the value of the short-circuit current about the thickness. However, the current-voltage characteristics about the anti-reflective coating are difficult to calculate without simulation tool. In this paper, a modeling technique to determine the short-circuit current value and the current-voltage characteristics in accordance with the thickness is proposed. In addition, artificial neural network is used to predict the short-circuit current with the dependence of temperature and thickness. Simulation results incorporating the artificial neural network model are obtained using MATLAB/Simulink and show the current-voltage characteristic according to the thickness of the anti-reflective coating.

• 마이크로전자및패키징학회지
• /
• 제19권3호
• /
• pp.1-7
• /
• 2012

Electroplating technology is widely used in semiconductor microelectronic industry. With the development of semiconductor integrated circuit to high density and light-small scale, Extremely high quality and plated uniformity of the deposited metals are needed. Simulation technique can help to obtain better plating results. Although a few plating simulation softwares have been commercialized, plating simulation is not widely prevalent in Korea. In this paper, principle of electroplating and mathematical modeling of plating simulation are discussed. Also introduced are some cases enhancing plating thickness uniformity on leadframe, PCB and wafer by using plating simulation.

• 한국시뮬레이션학회논문지
• /
• 제19권3호
• /
• pp.45-54
• /
• 2010

반도체 제조공정에 내재된 복잡성은 작업일정(job scheduling) 문제를 해석적 방법으로는 풀기 어렵기 때문에 보통 시스템 파라미터의 변화에 대한 효과를 이산사건 모델링 시뮬레이션에 의존하여 왔다. 한편 장비 고장 등 예측 불가능한 사건들은 고정된 작업일정 기법을 사용할 경우 전체 공정의 효율을 악화시킨다. 따라서 이러한 불확실성에 대해 최적의 성능을 내기 위해서는 작업일정을 실시간으로 대처 변경하는 것이 필요하다. 본 논문은 반도체 제조 공정에 대해 시스템 제어관점의 접근방법을 적용하여 이 문제에 적응형 실시간 작업제어 틀을 제안하고, DEVS 모델링 시뮬레이션 환경을 기반으로 제안된 틀을 설계 구현하였다. 제안된 방법은 기존의 임기응변적인 소프트웨어적인 방법에 비추어볼 때 전체 시스템을 이해하기 쉬우면서도 또한 추가되는 작업제어 규칙도 쉽게 추가 적용할 수 있는 유연성을 장점으로 가지고 있다. 여러 가지 실험결과 제안된 적응형 실시간 작업제어 프레임워크는 고정 작업규칙 방법에 비해 훨씬 나은 결과를 보여주어 그 효용성을 입증하였다.

• 한국시뮬레이션학회논문지
• /
• 제18권2호
• /
• pp.65-75
• /
• 2009

반도체 생산공정은 다양한 장비들이 복잡하게 서로 연관된 일련의 작업들로 구성되어 있다. 이들 장비들은 공학적 또는 환경적 요인들을 고려하여 직렬 또는 병렬의 혼합구조로 배치되어 있다. 따라서 많은 비용이 발생하고, 동시에 고려해야할 사항이 복잡하므로 한 번 설치되면 레이아웃 변경이 거의 불가능한 실정이다. 따라서 생산량의 변동이나 신제품의 개발과 같은 상황에서 새로운 설비의 투자나 레이아웃의 변경은 매우 신중하게 결정되어야 한다. 본 논문은 반도체의 부품을 생산하는 공장에 대해 시뮬레이션을 적용한 사례연구다. 시뮬레이션 모델은 $QUEST^{(R)}$라는 도구를 이용하여 개발되었으며, 시뮬레이션을 통하여 생산환경의 변화에 대응하는 다양한 전략을 검토하였다. 또한 본 연구에서는 결정인자가 다수인 대안에서 최적안을 도출해 내기 위하여 AHP 기법을 사용하였다.

• 마이크로전자및패키징학회지
• /
• 제12권1호
• /
• pp.59-63
• /
• 2005

금속-강유전체-반도체 전계효과 트랜지스터 (MFS/MFISFET)의 동작 특성을 technology computer-aided design (TCAD)과 simulation program with integrated circuit emphasis (SPICE)를 결합하여 전산모사하는 방법을 제시하였다. 복잡한 강유전체의 동작 특성을 수치해석을 이용하여 해석한 다음, 이를 이용하여 금속-강유전체-반도체 구조에서 반도체 표면에 인가되는 표면 전위를 계산하였다. 계산된 TCAD 변수인 표면 전위를 전계효과 트랜지스터의 SPICE 모델에서 구한 표면 전위와 같다고 보고게이트 전압에 따른 전류전압 특성을 구할 수 있었다. 이와 같은 방법은 향후 MFS/MFISFET를 이용한 메모리소자의 집적회로 설계에 매우 유용하게 적용될 수 있을 것이다.

• 전자공학회논문지A
• /
• 제32A권11호
• /
• pp.17-28
• /
• 1995

In this paper, we developed a two-dimensional numerical simulator which could analyze the stripe geometry semiconductor laser diodes by modifying the commercial semiconductor device simulator, MEDICI. In order to study the characteristics of semiconductor laser diodes, it is necessary to solve the Helmholtz wave equation and photon rate equation in addition to the basic semiconductor equations. Also the recombination rates due to the spontaneous and the stimulated emissions should be included, which are very important recombination mechanisms in semiconductor laser diodes. Therefore, we included the solution routines which analyzed the Helmholtz wave equation and the photon rate equation and two important recombination rates to simulate the semiconductor laser diodes. Then we simulated the gain-guiding and index-guiding DH(Double Heterostructure) semiconductor laser diodes to verify the validity of the implemented functions. The results obtained from simulation are well consistent with the previously published ones. This allows us to know the operating characteristics of DH laser diodes and is expected to use as a tool for optimum design.