• Title/Summary/Keyword: semiconductor nanowire

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On-Film Formation of Nanowires for High-efficiency Thermoelectric Devices

  • Ham, Jin-Hee;Shim, Woo-Young;Lee, Seung-Hyun;Voorhees, Peter W.;Lee, Woo-Young
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2009.04b
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    • pp.17-17
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    • 2009
  • We report the invention of a direct growth method termed On-Film Formation of Nanowire (OFF-ON) for making high-quality single-crystal nanowires, i.e. Bi and $Bi_2Te_3$, without the use of conventional templates, catalysts, or starting materials. We have used the OFF-ON technique to grow single crystal semi-metallic Bi and compound semiconductor $Bi_2Te_3$ nanowires from sputtered Bi and BiTe films after thermal annealing, respectively. The mechanism for nanowire growth is stress-induced mass flow along grain boundaries in the polycrystalline films. OFF-ON is a simple but powerful method for growing perfect single-crystal semi-metallic and compound semiconductor nanowires of high aspect ratio with high crystallinity that distinguishes it from other competitive growth approaches that have been developed to date. Our results suggest that Bi and $Bi_2Te_3$ nanowires grown by OFF-ON can be an ideal material system for exploring their unique thermoelectric properties due to their high-quality single crystalline and high conductivity, which have consequence and relevance for high-efficiency thermoelectric devices.

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Characteristics of a Flexible Transparent Electrode based on a Silver Nanowire-polymer Composite Material with a Mesh Pattern Formed without Lithography (리소그래피 없이 제작된 그물망 구조의 은나노와이어-고분자화합물 복합소재 기반 유연 투명전극의 특성)

  • Park, Tae Gon;Park, Jong Seol;Park, Jin Seok
    • Journal of the Semiconductor & Display Technology
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    • v.19 no.4
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    • pp.11-17
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    • 2020
  • In this study, a new method for fabricating flexible transparent electrodes based on silver nanowire-polymer (AgNW-PEDOT:PSS) composite materials having a mesh pattern formed by a solution-based process without lithography was proposed. By optimizing conditions such as the amount of ultraviolet (UV) photosensitizer injected into the suspension of AgNW and PEDOT:PSS, UV exposure time, and deionized (DI) washing time, a clear and uniform mesh pattern was obtained. For the fabricated AgNW-PEDOT:PSS-based mesh-type electrodes, characteristics such as electrical sheet resistance, light transmittance, haze, and bending flexibility were analyzed according to the mixing ratio of AgNW and PEDOT:PSS included in the suspension. The fabricated mesh electrodes typically exhibited a low electrical sheet resistance of less than 20 Ω/sq while maintaining a high transmittance of 80% or more. In addition, it was confirmed from the results of analyzing the effect of PEDOT:PSS on the characteristics of the mesh-type AgNW-PEDOT electrode that the optical visibility was greatly enhanced by reducing the surface roughness and haze, and the bending flexibility was remarkably improved.

Size Scaling에 따른 Gate-All-Around Silicon Nanowire MOSFET의 특성 연구

  • Lee, Dae-Han;Jeong, U-Jin
    • Proceeding of EDISON Challenge
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    • 2014.03a
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    • pp.434-438
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    • 2014
  • CMOS의 최종형태로써 Gate-All-Around(GAA) Silicon Nanowire(NW)가 각광받고 있다. 이 논문에서 NW FET(Field Effect Transistor)의 채널 길이와 NW의 폭과 같은 size에 따른 특성변화를 실제 실험 data와 NW FET 특성분석 simulation을 이용해서 비교해보았다. MOSFET(Metal Oxide Semiconductor Field Effect Transistor)의 소형화에 따른 쇼트 채널 효과(short channel effect)에 의한 threshold voltage($V_{th}$), Drain Induced Barrier Lowering(DIBL), subthreshold swing(SS) 또한 비교하였다. 이에 더하여, 기존의 상용툴로 NW를 해석한 시뮬레이션 결과와도 비교해봄으로써 NW의 size scaling에 대한 EDISON NW 해석 simulation의 정확도를 파악해보았다.

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Sensing Properties of Ga-doped ZnO Nanowire Gas Sensor

  • Lee, Sang Yeol
    • Transactions on Electrical and Electronic Materials
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    • v.16 no.2
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    • pp.78-81
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    • 2015
  • Pure ZnO and ZnO nanowires doped with 3 wt.% Ga (‘3GZO’) were grown by pulsed laser deposition in a furnace system. The doping of Ga in ZnO nanowires was analyzed by observing the optical and chemical properties of the doped nanowires. The diameter and length of nanowires were under 200 nm and several ${\mu}m$, respectively. Changes of significant resistance were observed and the sensitivities of ZnO and 3GZO nanowires were compared. The sensitivities of ZnO and 3GZO nanowire sensors measured at 300℃ for 1 ppm of ethanol gas were 97% and 48%, respectively.

Quantum modulation of the channel charge and distributed capacitance of double gated nanosize FETs

  • Gasparyan, Ferdinand V.;Aroutiounian, Vladimir M.
    • Advances in nano research
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    • v.3 no.1
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    • pp.49-54
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    • 2015
  • The structure represents symmetrical metal electrode (gate 1) - front $SiO_2$ layer - n-Si nanowire FET - buried $SiO_2$ layer - metal electrode (gate 2). At the symmetrical gate voltages high conductive regions near the gate 1 - front $SiO_2$ and gate 2 - buried $SiO_2$ interfaces correspondingly, and low conductive region in the central region of the NW are formed. Possibilities of applications of nanosize FETs at the deep inversion and depletion as a distributed capacitance are demonstrated. Capacity density is an order to ${\sim}{\mu}F/cm^2$. The charge density, it distribution and capacity value in the nanowire can be controlled by a small changes in the gate voltages. at the non-symmetrical gate voltages high conductive regions will move to corresponding interfaces and low conductive region will modulate non-symmetrically. In this case source-drain current of the FET will redistributed and change current way. This gives opportunity to investigate surface and bulk transport processes in the nanosize inversion channel.

Characteristics of Nanowire CMOS Inverter with Gate Overlap (Gate Overlap에 따른 나노선 CMOS Inverter 특성 연구)

  • Yoo, Jeuk;Kim, Yoonjoong;Lim, Doohyeok;Kim, Sangsig
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.66 no.10
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    • pp.1494-1498
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    • 2017
  • In this study, we investigate the influence of an overlap between the gate and source/drain regions of silicon nanowire (SiNW) CMOS (complementary metal-oxide-semiconductor) inverter on bendable plastic substrates and describe their electrical characteristics. The combination of n-channel silicon nanowire field-effect transistor (n-SiNWFET) and p-channel silicon nanowire field-effect transistor (p-SiNWFET) operates as an inverter logic gate. The gains with a drain voltage ($V_{dd}$) of 1 V are 3.07 and 1.21 for overlapped device and non-overlapped device, respectively. The superior electrical characteristics of each of the SiNW transistors including steep subthreshold slopes and the high $I_{on}/I_{off}$ ratios are major factors that enable the excellent operation of the logic gate.

Nanoscale Floating-Gate Characteristics of Colloidal Au Nanoparticles Electrostatically Assembled on Si Nanowire Split-Gate Transistors

  • Jeon, Hyeong-Seok;Park, Bong-Hyun;Cho, Chi-Won;Lim, Chae-Hyun;Ju, Heong-Kyu;Kim, Hyun-Suk;Kim, Sang-Sig;Lee, Seung-Beck
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.6 no.2
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    • pp.101-105
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    • 2006
  • Nanoscale floating-gate characteristic of colloidal Au nanoparticles electrostatically assembled on the oxidized surface of Si nanowires have been investigated. The Si nanowire split-gate transistor structure was fabricated by electron beam lithography and subsequent reactive ion etching. Colloidal Au nanoparticles with ${\sim}5$ nm diameters were selectively deposited onto the Si nanowire surface by 2 min electrophoresis. It was found that electric fields applied to the self-aligned split side gates allowed charge to be transferred on the Au nanoparticles. It was observed that the depletion mode cutoff voltage, induced by the self-aligned side gates, was shifted by more than 1 V after Au nanoparticle electrophoresis. This may be due to the semi-one dimensional nature of the narrow Si nanowire transport channel, having much enhanced sensitivity to charges on the surface.

Fabrication Process of Single CuO Nanowire Devices

  • Vu, Xuan Hien;Jo, Kwang-Min;Kim, Se-Yun;Lee, Joon-Hyung;Kim, Jeong-Joo;Heo, Young-Woo
    • Applied Science and Convergence Technology
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    • v.23 no.3
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    • pp.134-138
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    • 2014
  • One-dimensional nanostructures such as nanowires have been extensively investigated as a promising type of material for applications of nanoscale technology. The fabrication of single-nanowire devices are consequently important and interesting. This study introduced a feasible method for growing CuO nanowires on Cu foils. The nanowires had diameters of 10~150 nm and lengths of more than $7{\mu}m$ and were grown by means of thermal oxidation in a vacuum. They were entirely and uniformly grown over the Cu foil surfaces and could be extracted and dispersed in an ethanol solution for further purposes. In addition, a simple fabrication method for realizing device functionality from a single CuO nanowire was reported. Fabricated devices were carefully checked by field-emission scanning electron microscopy (SEM). The probability of the realization of a single-CuO-nanowire device relative to that of all other types was estimated to be around 25%. Finally, the I-V characteristics of the devices were analyzed.

Electrochemical Formation and Characterization of III-V Compound Semiconductor InSb Nanowires (III-V족 화합물 반도체 InSb 나노와이어의 전기화학적 합성 및 특성 평가)

  • Lee, Kwan-Hyi;Lee, Jong-Wook;Park, Ho-Dong;Jeung, Won-Young;Lee, Jong-Yup
    • Journal of the Korean Electrochemical Society
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    • v.8 no.3
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    • pp.130-134
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    • 2005
  • To the best knowledge, the formation and characterization of InSb nanowires have not been reported yet in spite of its good characteristics as a III-V compound semiconductor. The nanowire arrays were potentiostatically electrodeposited in a mixing solution of indium chloride, antimony chloride, citric acid, and potassium citrate according to our previous work on the electrodeposition of the stoichiometric InSb films. The electrical properties of nanowire arrays were measured by semiconductor parameter analyzer, and the microstructural analysis of the nanowires was conducted by employing XRD. Our experimental results indicate that the InSb nanowires have a highly preferred orientation of (220) direction and also exhibit electrical characteristics of n-type semiconductors which we, however, similar to semi-metals mainly due to their narrow band-gap and high electron mobility.

Silver Nanowire-based Stretchable and Transparent Electrodes (Silver Nanowire 기반 Stretchable 투명 전극)

  • Lee, Jin-Young;Kim, Su-Yeon;Jeong, Da-Hye;Shin, Dong-Kyun;Yoo, Su-Ho;Seo, Hwa-Il;Park, Jong-Woon
    • Journal of the Semiconductor & Display Technology
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    • v.14 no.3
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    • pp.51-55
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    • 2015
  • We have fabricated silver nanowire (AgNW) films as a stretchable and transparent electrode on polydimethylsiloxane (PDMS) substrates using a spray coater. Inherently, they show poor surface roughness and stretchability. To tackle it, we have employed a conductive polymer, poly (3,4-ethylenedioxythiophene) : Poly(styrene sulfonate) (PEDOT : PSS). PEDTO : PSS solution is mixed with AgNWs or spin-coated on the AgNW film. Compared with AgNW film only, PEDOT : PSS film only, and polymer-mixed AgNW films, the AgNW/polymer bilayer films exhibit much better surface roughness and stretchability. It is found that spray-coating of AgNWs on uncured PDMS and spin-coating of PEDOT : PSS solution on the AgNW films enhance the surface roughness of electrodes. Such a bilayer structure also provides a stable resistance under tensile strain due to the fact that each layer acts as a detour route for carriers. With this structure, we have obtained the peak-to-peak roughness ($R_{pv}$) as low as 76.8nm and a moderate increase of sheet resistance (from $10{\Omega}/{\Box}$ under 0% strain to $30{\Omega}/{\Box}$ under 40% strain).