• 반도체디스플레이기술학회지
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• 제19권3호
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• pp.55-60
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• 2020

The hard mask photo-resist strip inspection system for the semiconductor wafer manufacturing process inspects the position of the circuit pattern formed on the wafer by measuring the distance from the edge of the wafer to the strip processing area. After that, it is an inspection system that enables you to check the process status in real time. Process defects can be significantly reduced by applying a tester that has not been applied to the existing wafer strip process, edge etching process, and wafer ashing process. In addition, it is a technology for localizing semiconductor process inspection equipment that can analyze the outer diameter of the wafer and the state of pattern formation, which can secure process stability and improve wafer edge yield.

• 대한산업공학회지
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• 제41권6호
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• pp.572-578
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• 2015

Yield prediction is one of the most important issues in semiconductor manufacturing. Especially, for a fast-changing environment of the semiconductor industry, accurate and reliable prediction techniques are required. In this study, we propose a prediction model to predict wafer yield based on virtual metrology process parameters in semiconductor manufacturing. The proposed prediction model addresses imbalance problems frequently encountered in semiconductor processes so as to construct reliable prediction model. The effectiveness and applicability of the proposed procedure was demonstrated through a real data from a leading semiconductor industry in South Korea.

• 한국정밀공학회지
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• 제15권10호
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• pp.103-112
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• 1998

The evolution of semiconductor manufacturing technology has accelerated the reduction of device dimensions and the increase of integrated circuit density. In order to improve yield within a short turn around time and maintain it at high level, a system that can rapidly determine problematic processing steps is needed. The statistical process control detects abnormal process variation of key parameters. Expert systems in SPC can serve as a valuable tool to automate the analysis and interpretation of control charts. A set of IF-THEN rules was used to formalize knowledge base of special causes. This research proposes a strategy to apply expert system to SPC in semiconductor manufacturing. In analysis, the expert system accomplishes the instability detection of process parameter, In diagnosis, an engineer is supported by process analyzer program. An example has been used to demonstrate the expert system and the process analyzer.

• 대한산업공학회지
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• 제28권4호
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• pp.415-424
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• 2002

Semiconductor manufacturing has been emerged as a highly competitive but profitable business. Accordingly it becomes very important for semiconductor manufacturing companies to meet customer demands at the right time, in order to keep the leading edge in the world market. However, due-date oriented production is very difficult task because of the complex job flows with highly resource conflicts in fabrication shop called FAB. Due to its cyclic manufacturing feature of products, to be completed, a semiconductor product is processed repeatedly as many times as the number of the product manufacturing cycles in FAB, and FAB processes of individual manufacturing cycles are composed with similar but not identical unit processes. In this paper, we propose a production scheduling and control scheme that is designed specifically for semiconductor scheduling environment (FAB). The proposed scheme consists of three modules: simulation module, cycle due-date estimation module, and dispatching module. The fundamental idea of the scheduler is to introduce the due-date for each cycle of job, with which the complex job flows in FAB can be controlled through a simple scheduling rule such as the minimum slack rule, such that the customer due-dates are maximally satisfied. Through detailed simulation, the performance of a cycle due-date based scheduler has been verified.

• 전기학회논문지
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• 제61권9호
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• pp.1330-1335
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• 2012

This paper proposes an automatic measurement sampling method for the semiconductor manufacturing process. The method recommends sampling rates using information of process capability indexes and production scheduling plan within the restricted metrology capacity. In addition, it automatically controls the measurement WIP (Work In Process) using measurement priority values to minimize the measurement risks and optimize the measurement capacity. The proposed sampling method minimizes measurement controls in the semiconductor manufacturing process and improves the fabrication productivity via reducing measurement TAT (Turn Around Time), while guaranteeing the level of process quality.

• 분석과학
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• 제5권4호
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• pp.455-464
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• 1992

본 논문에서는 FT-IR 분광분석법을 이용하여 여러 가지 반응조건에서 기체상 silylation 반응에 의해 생성된 silylated layer의 depth를 비파괴적으로 정량하는 방법을 제안하였다. Silylated layer의 depth는 FT-IR 스펙트럼의 특성 봉우리들(Si-O-ph, Si-C, Si-H)의 흡광도를 바탕 스펙트럼 공제법으로 측정하여 SEM의 두께 측정치와 비교하여 정량하였다. FT-IR 분광분석법을 이용한 Silylated layer의 depth 분석은 비파괴적이고 정량적인 방법으로, 이 방법은 silylation process window를 설정하는 데 적합하다는 것을 알았다.

• 반도체디스플레이기술학회지
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• 제22권1호
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• pp.124-128
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• 2023

반도체 양산을 진행하며 얻어지는 여러 공정 데이터들로 사용 전압을 예측하여 에너지 효율적인 제품을 위한 목적으로 연구를 시작했다. 각각의 feature들 단독으로 전압을 예측하기 어려웠던 문제를 머신 러닝을 통해, 특히 Ensemble model을 이용함으로써 단일 모델보다 정확한 예측을 할 수 있었다. 더욱 중요한 시사점으로는 feature importance 분석을 통해 모델 예측에 영향이 큰 feature와 작은 feature에 대한 분석이다. 영향도가 높은 feature를 통해 비슷한 계열의 측정값을 늘리고, 낮은 feature 들의 문제점을 개선함으로써 차세대 제품에서 더욱 정확도 높은 모델을 위한 발판을 마련할 수 있었다.

• 반도체디스플레이기술학회지
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• 제10권1호
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• pp.101-105
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• 2011

In case of high-tech process industries such as semiconductor and TFT-LCD manufactures, fault of a virtually finished product that is value-added one, since it has gone throughout the most of processes, may give rise to quality cost nearly amount to its selling price and can be a main cause that decreases the efficiency of manufacturing process. This paper proposes a real-time dispatching algorithm for semiconductor manufacturing process with rework. In order to evaluate the proposed algorithm, this paper examines the performance of the proposed method by comparing it with that of the existing dispatching algorithms, based on various experimental data.

• 대한산업공학회지
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• 제38권1호
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• pp.46-56
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• 2012

The purpose of virtual metrology (VM) in semiconductor manufacturing is to predict every wafer's metrological values based on its process equipment data without an actual metrology. In this paper, we propose novelty detection-based reliability estimation models for VM in order to support flexible utilization of VM results. Because the proposed model can not only estimate the reliability of VM, but also identify suspicious process variables lowering the reliability, quality control actions can be taken selectively based on the reliance level and its causes. Based on the preliminary experimental results with actual semiconductor manufacturing process data, our models can successfully give a high reliance level to the wafers with small prediction errors and a low reliance level to the wafers with large prediction errors. In addition, our proposed model can give more detailed information by identifying the critical process variables and their relative impacts on the low reliability.

• 산업공학
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• 제13권3호
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• pp.348-357
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• 2000

SCM(Supply Chain Management) is a new approach to satisfy customers via an integrated management for the whole business processes of the manufacturing from the raw material procurement to the product or service delivery to customers. Typically the semiconductor industry is the one whose supply chain network is distributed all over the world, and its manufacturing process has the particular characteristics which has to be considered in the modeling of supply chain. In this paper we suggest the push and pull type supply chain models based on the manufacturing characteristics and their mathematical formulation for the semiconductor industry. Push supply chain model pursuits the high throughput and the balance of the WIP flow, and pull supply chain model does to minimize the total cost of order-based manufacturing, distribution and transportation process in order to meet customer's request appropriately.