• Journal of the Microelectronics and Packaging Society
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• v.25 no.3
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• pp.21-30
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• 2018

Driven by the recent energy saving trend, conventional silicon based power conversion modules are being replaced by modules using silicon carbide. Previous papers have focused mainly on the electrical advantages of silicon carbide semiconductors that can be used to design switching devices with much lower losses than conventional silicon based devices. However, no systematic study of their thermomechanical reliability in power conversion modules using finite element method (FEM) simulation has been presented. In this paper, silicon and silicon carbide based power devices with three-phase switching were designed and compared from the viewpoint of thermomechanical reliability. The switching loss of power conversion module was measured by the switching loss evaluation system and measured switching loss data was used for the thermal FEM simulation. Temperature and stress/strain distributions were analyzed. Finally, a thermal fatigue simulation was conducted to analyze the creep phenomenon of the joining materials. It was shown that at the working frequency of 20 kHz, the maximum temperature and stress of the power conversion module with SiC chips were reduced by 56% and 47%, respectively, compared with Si chips. In addition, the creep equivalent strain of joining material in SiC chip was reduced by 53% after thermal cycle, compared with the joining material in Si chip.

• Journal of the Semiconductor & Display Technology
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• v.15 no.4
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• pp.27-32
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• 2016

In recent years, various researches have been conducted to improve process yields in accordance with miniaturization of semiconductor. APC(Advanced Process Control) is considered one of the methods to increase in process yields. APC is a process control technology that maintains optimal process conditions and improves the reliability of results by controlling and formulating the relationship among the various process parameters and results. We built up an optical diagnostic system with a three-channel spectrometer. The system detects signals those represent the changes of specific emission peaks intensity versus each reference and converts it into MFC control signals to get back the changes to the reference state. Controlling the MFC continues until the specific peak intensity changes into the normal state. Through this device, we tested a APC automatically responding to process changes during the plasma process. We could control gas flow while sputtering process on going and improve uniformity of plasma intensity with this system. Finally, we have got results those enhance the plasma intensity non-uniformity to 7.7% from 15.5%. Also, found unexpected oxygen flow what is estimated to be come out from IGZO target.

• The Journal of the Korea institute of electronic communication sciences
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• v.14 no.3
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• pp.619-626
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• 2019

The advances of semiconductor and circuitry technology dovetailed with nano processing techniques have further enhanced micro-miniaturization, sensitivity, longevity and reliability in MID(Medical Implant Device). Nevertheless, one of the remaining challenges is whether power can sufficiently and continuously be supplied for the operation of the MID. Self-powered MID that harvest biomechanical energy from human motion, respiratory and muscle movement are part of a paradigm shift. In this paper, we developed a rechargeable pacemaker through self-power generation with the triboelectric nanogenerator. We demonstrate a fully implanted pacemaker based on an implantable triboelectric nanogenerator, which act as a storage as well as active movement on a large-animal(dog) scale. The self-power pacemaker harvested from animal motion is 2.47V, which is higher than the required pacemaker device sensing voltage(1.35V).

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.11 no.4
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• pp.388-393
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• 2018

In this paper, We developed a high efficiency reflector integrated type 50W AC direct connection type engine to realize miniaturization and weight reduction of product without using SMPS and to design a multistage varistor circuit Reduced costs by reducing the number of parts High reliability is achieved by using a circuit structure that does not use an electrolytic capacitor, thus increasing the lifetime of the LED. In addition, it is possible to manufacture an AC direct-coupled type driving device by using an IC semiconductor and apply an AC direct-coupled type driving device integrated with a reflector so that the lifetime of the device can be fully utilized for the lifetime of the LED, A light source having a plurality of light emitting diode channels including a plurality of light emitting diode channels arranged in series is driven with a rectified voltage.

• Proceedings of the Korean Society of Propulsion Engineers Conference
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• 2007.11a
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• pp.252-255
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• 2007

Recently military industrial company, utilizing company funded R&D and goverment and industry contracts, has developed ACTS/DACS technology. This technology can be utilized to rapidly steer "smart" bullets, "smart" rounds, tactical missile, cruise missile and kill vehicles for both endo- and exoatmospheric applications. The ACTS/DACS typically consists of a Smart Bus Controller(SCB), a proprietary network firing bus, Smart Pyrotechnic Devices(SPD), rocket motors, and a structure. The SCB communicates with the SPDs over the propretary network firing bus. Each rocket motor contains an SPD which provides rocket motor ignition. Firing energy is stored locally in the SPD so surge currents do not occur in the system as rocket motors are fired. This approach allows multiple, truly simultaneous firings without the need for large, dedicated batteries. Each SPD also functions as a network tranceiver and high reliability fir set all in the space of a single-sided 10 millimeter diameter circuit. The present work develops a new means for igniting explosive materials. The volume of semiconductor bridge (SCB) is over 30 times smaller than a conventional hot wire. We believe that the present work has a potential for development of a new igniter such as smart pyrotechnic device.

• Journal of IKEEE
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• v.19 no.3
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• pp.288-294
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• 2015

CRC function has been built into the high-speed semiconductor memory device in order to increase the reliability of data for high-speed operation. Also, DBI function is adopted to improve of data transmission speed. Conventional CRC(ATM-8 HEC code) method has a significant amounts of area-overhead(~XOR 700 gates), and processing time(6 stage XOR) is large. Therefore it leads to a considerable burden on the timing margin at the time of reading and writing of the low power memory devices for CRC calculations. In this paper, we propose a CRC method for low cost and high speed memory, which was improved 92% for area-overhead. For low-cost implementation of the CRC scheme by the DBI function it was supplemented by data bit error detection rate. And analyzing the error detection rate were compared with conventional CRC method.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.13 no.9
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• pp.729-734
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• 2000

Recently, Very Large Scale Integrated (VLSI) circuit & deep-submicron bulk Complementary Metal Oxide Semiconductor(CMOS) devices require gate electrode materials such as metal-silicide, Titanium-silicide for gate oxides. Many previous authors have researched the improvement sub-micron gate oxide quality. However, few have reported on the electrical quality and reliability on the ultra thin gate oxide. In this paper, at first, I recommand a novel shallow trench isolation structure to suppress the corner metal-oxide semiconductor field-effect transistor(MOSFET) inherent to shallow trench isolation for sub 0.1${\mu}{\textrm}{m}$ gate oxide. Different from using normal LOCOS technology deep-submicron CMOS devices using novel Shallow Trench Isolation(STI) technology have a unique"inverse narrow-channel effects"-when the channel width of the devices is scaled down, their threshold voltage is shrunk instead of increased as for the contribution of the channel edge current to the total channel current as the channel width is reduced. Secondly, Titanium silicide process clarified that fluorine contamination caused by the gate sidewall etching inhibits the silicidation reaction and accelerates agglomeration. To overcome these problems, a novel Two-step Deposited silicide(TDS) process has been developed. The key point of this process is the deposition and subsequent removal of titanium before silicidation. Based on the research, It is found that novel STI structure by the SEM, in addition to thermally stable silicide process was achieved. We also obtained the decrease threshold voltage value of the channel edge. resulting in the better improvement of the narrow channel effect. low sheet resistance and stress, and high threshold voltage. Besides, sheet resistance and stress value, rms(root mean square) by AFM were observed. On the electrical characteristics, low leakage current and trap density at the Si/SiO$_2$were confirmed by the high threshold voltage sub 0.1${\mu}{\textrm}{m}$ gate oxide.

• Transactions of the Korean Society of Mechanical Engineers B
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• v.37 no.1
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• pp.75-79
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• 2013

Demands for semiconductor devices are dramatically increasing, and advancements in fabrication technology are allowing a step-up in the number of devices per unit area. As a result, semiconductor devices require higher heat dissipation, and thus, cooling solutions have become important for guaranteeing their operational reliability. In particular, in chip-in-board packages, in which chips and passives are embedded in the substrates for efficient device layout, heat dissipation is of greater importance. In this study, a thermal model for layers of different materials has been proposed, and then, the heat transfer has been simulated by imposing a set of appropriate boundary conditions. Heat generation can be predicted based on the results, which will be utilized as practical data for actual package design.

• Ceramist
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• v.21 no.2
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• pp.4-18
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• 2018

Lastly, neuromorphic computing chip has been extensively studied as the technology that directly mimics efficient calculation algorithm of human brain, enabling a next-generation intelligent hardware system with high speed and low power consumption. Three-terminal based synaptic transistor has relatively low integration density compared to the two-terminal type memristor, while its power consumption can be realized as being so low and its spike plasticity from synapse can be reliably implemented. Also, the strong electrical interaction between two or more synaptic spikes offers the advantage of more precise control of synaptic weights. In this review paper, the results of synaptic transistor mimicking synaptic behavior of the brain are classified according to the channel material, in order of silicon, organic semiconductor, oxide semiconductor, 1D CNT(carbon nanotube) and 2D van der Waals atomic layer present. At the same time, key technologies related to dielectrics and electrolytes introduced to express hysteresis and plasticity are discussed. In addition, we compared the essential electrical characteristics (EPSC, IPSC, PPF, STM, LTM, and STDP) required to implement synaptic transistors in common and the power consumption required for unit synapse operation. Generally, synaptic devices should be integrated with other peripheral circuits such as neurons. Demonstration of this neuromorphic system level needs the linearity of synapse resistance change, the symmetry between potentiation and depression, and multi-level resistance states. Finally, in order to be used as a practical neuromorphic applications, the long-term stability and reliability of the synapse device have to be essentially secured through the retention and the endurance cycling test related to the long-term memory characteristics.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.5
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• pp.682-687
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• 2014

We have performed reverse gate bias stress tests on AlGaN/GaN-on-Si Heterostructure FETs (HFETs). The shift of threshold voltage ($V_{th}$) and the reduction of on-current were observed from the stressed devices. These changes of the device parameters were not permanent. We investigated the temporary behavior of the stressed devices by analyzing the temperature dependence of the instabilities and TCAD simulation. As the baseline temperature of the electrical stress tests increased, the changes of the $V_{th}$ and the on-current were decreased. The on-current reduction was caused by the positive shift of the $V_{th}$ and the increased resistance of the gate-to-source and the gate-to-drain access region. Our experimental results suggest that electron-trapping effect into the shallow traps in devices is the main cause of observed instabilities.