• 제목/요약/키워드: semiconductor and LCD

검색결과 190건 처리시간 0.025초

?Color STN (CSTN) LCD Driver Integrated Circuit with Sense Amplifier of Non-Volatile Memory

  • Shin, Chang-Hee;Cho, Ki-Seok;Lee, Yong-Sup;Lee, Jae-Hoon;Sohn, Ki-Sung;Kwon, Oh-Kyong
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제6권2호
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    • pp.87-89
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    • 2006
  • This paper proposes a sense amplifier with non-volatile memory in order to improve the image quality of LCD by enhancing the matching of the driving voltages between the panel and driver. The sense amplifier having a wide sensing margin and fast response adjusts LCD driver voltage of display driver. The CSTN-LCD with the sense amplifier results improved image quality than that with conventional 6 bit column driver without it.

반도체 공정용 기능수의 용해오존 분해장치에 관한 연구 (A Study on Dissolved Ozone Decomposer in Ozonated Water for Semiconductor Process)

  • 문세호;채상훈;손영수
    • 대한전자공학회논문지SD
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    • 제48권5호
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    • pp.6-11
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    • 2011
  • 반도체 및 LCD 세정공정에 사용된 오존수 속의 용해오존을 분해할 수 있는 시스템을 개발함으로써 향후 고성능-저가격의 반도체, LCD PR 박리 및 세정 공정에 적용할 수 있는 핵심 공정기술을 확보하였다. 이 기술을 적용하면 반도체 웨이퍼 및 LCD 평판의 PR 박리 세정 공정을 보다 빠르고 저렴한 비용으로 수행할 수 있으므로 반도체 및 LCD 공정 생산성의 향상을 꾀할 수 있다.

반도체/LCD PR 제거용 EC의 재이용 기술에 관한 연구 (A Study on Recycling Technology of EC for Semiconductor and LCD PR Stripping Process)

  • 문세호;채상훈
    • 대한전자공학회논문지SD
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    • 제46권10호
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    • pp.25-30
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    • 2009
  • 오존을 이용하여 PR 박리에 사용된 에틸렌 카보네이트계 박리 세정제를 재이용할 수 있는 기술에 대하여 연구함으로써 향후 고성능-저가격의 반도체, LCD 제조에서의 PR 박리 및 세정 공정에 적용할 수 있는 핵심 공정기술을 확보하였다. 이 기술을 적용하면 반도체 웨이퍼 및 LCD 평판의 PR 박리 세정을 보다 빠르고 저렴한 비용으로 수행할 수 있으므로 반도체 및 LCD 제작공정의 생산성을 향상시킬 수 있다.

On the performance of Multi-Valued Image Entropy Coding for LCD source drivers

  • Sasaki, Hisashi;Arai, Tooru;Hachiuma, Masayuki;Masuko, Akira;Taguchi, Takashi
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2004년도 Asia Display / IMID 04
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    • pp.1240-1243
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    • 2004
  • Multi-Valued Image Entropy Coding (MVIEC) is a new class of joint source channel coding, which reduces both input-width (1/4) and average current (0.36-1.3) for LCD source drivers. This paper describes the detail results on MVIEC for several image sets in order to verify the practical performance.

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AOI 데이터를 이용한 효과적인 Defect Size Distribution 구축방법: 반도체와 LCD생산 응용 (Effective Construction Method of Defect Size Distribution Using AOI Data: Application for Semiconductor and LCD Manufacturing)

  • 하정훈
    • 산업공학
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    • 제21권2호
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    • pp.151-160
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    • 2008
  • Defect size distribution is a probability density function for the defects that occur on wafers or glasses during semiconductor/LCD fabrication. It is one of the most important information to estimate manufacturing yield using well-known statistical estimation methods. The defects are detected by automatic optical inspection (AOI) facilities. However, the data that is provided from AOI is not accurate due to resolution of AOI and its defect detection mechanism. It causes distortion of defect size distribution and results in wrong estimation of the manufacturing yield. In this paper, I suggest a size conversion method and a maximum likelihood estimator to overcome the vague defect size information of AOI. The methods are verified by the Monte Carlo simulation that is constructed as similar as real situation.

The Study of the Charge Transport on the Surface Layer of the Patterned Vertical Alignment(PVA) Mode

  • Choi, Nak-Cho;You, Jae-Yong;Jung, Ji-Young;Rhie, Kung-Won;Shin, Sung-Tae
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2007년도 7th International Meeting on Information Display 제7권1호
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    • pp.571-573
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    • 2007
  • It is known that the main source of the area image sticking is the ion charge adsorption on the alignment layer. We found out that the adsorption of the ion charge of the liquid crystal in the cell was physisorption, which takes place between all molecules on any surface providing the adsorption force is small.

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Array Testing of TFT-LCD Panel with Integrated Gate Driver Circuits

  • Lee, Jonghwan
    • 반도체디스플레이기술학회지
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    • 제19권3호
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    • pp.68-72
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    • 2020
  • A new method for array testing of TFT-CD panel with the integrated gate driver circuits is presented. As larger size/high resolution TFT-LCD with the peripheral driver circuits has emerged, one of the important problems for manufacturing is array testing on the panel. This paper describes the technology of detecting defective arrays and optimizing the array testing process. For the effective characterization of pixel array, the pixel storage capability is simulated and measured with voltage imaging system. This technology permits full functional testing during the manufacturing process, enabling fabrication of large TFT-LCD panels with the integrated driver circuits.

LCD Driver IC용 Charge Pumping 회로 설계 (Design of Charge Pumping Circuit for LCD Driver IC)

  • 권용중;김학윤;서상조;최호용
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2008년도 하계종합학술대회
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    • pp.575-576
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    • 2008
  • This paper presents a design of a charge pumping circuit for LCD Driver IC. The charge pumping circuit consists of a control block, a VCIOUT generating block, a DDVDH generating block, a VGH/VGL generating block, and VCL generating block. It generates various higher and lower voltage than supply voltage using external control input. Simulation results show that voltages of DDVDH, VGH, VGL, and VCL satisfy the target voltage, and the output DDVDH drives the output current 7mA.

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LCD 결함 검출을 위한 머신 비전 알고리즘 연구 (Study on Machine Vision Algorithms for LCD Defects Detection)

  • 정민철
    • 반도체디스플레이기술학회지
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    • 제9권3호
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    • pp.59-63
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    • 2010
  • This paper proposes computer visual inspection algorithms for various LCD defects which are found in a manufacturing process. Modular vision processing steps are required in order to detect different types of LCD defects. Those key modules include RGB filtering for pixel defects, gray-scale morphological processing and Hough transform for line defects, and adaptive threshold for spot defects. The proposed algorithms can give users detailed information on the type of defects in the LCD panel, the size of defect, and its location. The machine vision inspection system is implemented using C language in an embedded Linux system for a high-speed real-time image processing. Experiment results show that the proposed algorithms are quite successful.

개선된 QVGA급 LCD Driver IC의 그래픽 메모리 설계 (Improved Design of Graphic Memory for QVGA-Scale LCD Driver IC)

  • 차상록;이보선;김학윤;최호용
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2008년도 하계종합학술대회
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    • pp.589-590
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    • 2008
  • This paper describes an improved design of graphic memory for QVGA ($320{\times}240\;RGB$) - scale 262k-color LCD Driver IC. A distributor block is adopted to reduce graphic RAM area, which is accomplished with 1/8 data lines of the previous structure. In line-read operation, the drivabilty of memory array cell is improved by partitioning a word line according to the row address. The proposed graphic memory circuit has been designed in transistor level using $0.18{\mu}m$ CMOS technology library and verified using Hsim.

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