• Title/Summary/Keyword: self-reset

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Self-Reset Zero-Current Switching Circuit for Low-Power and Energy-Efficient Thermoelectric Energy Harvesting (저전력 고에너지 효율 열전에너지 하베스팅을 위한 자가 리셋 기능을 갖는 영점 전류 스위칭 회로 설계)

  • An, Ji Yong;Nguyen, Van Tien;Min, Kyeong-Sik
    • Journal of IKEEE
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    • v.25 no.1
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    • pp.206-211
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    • 2021
  • This paper proposes a Self-Reset Zero-Current Switching (ZCS) Circuit for thermoelectric energy harvesting. The Self-Reset ZCS circuit minimizes the operating current consumed by the voltage comparator, thereby reduces the power consumption of the energy harvesting circuit and improves the energy conversion efficiency by adding the self-reset function to the comparator. The Self-Reset ZCS circuit shows 3.4% of improvement in energy efficiency compared to the energy harvesting system with the conventional analog comparator ZCS for the output/input voltage ratio of 5.5 as a result of circuit simulation. The proposed circuit is useful for improving the performance of the wearable and bio-health-related harvesting circuits, where low-power and energy-efficient thermoelectric energy harvesting is needed.

Influence of reset pulse form on electrical characteristics in AC-PDP

  • Cho, T.S.;Ko, J.J.;Lee, C.W.;Cho, G.S.;Choi, E.H.
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2000.04a
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    • pp.159-161
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    • 2000
  • After the square type reset pulse, the condition of remaining wall charge has been experimentally investigated in AC-PDP with VDS (Versatile Driving Simulator) system, in which arbitrary driving waveform and sequence can be used. After the self-discharge process, almost wall charges are eliminated. But some wall charges are not and its quantity is dependent on the voltage of the reset pulse. When the voltage of the reset pulse is growing, its quantity is decreased. But if the voltage of the reset pulse is above 300V, the wall voltage due to remaining wall charge is constant and its value is found out 6V. Also it is found that its polarity is always same with the one made by the reset pulse. It means that the polarity is not changed by the self-discharge.

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A Study on the Characteristics of Priming Discharge in the PDPs (PDP의 프라이밍 방전특성에 관한 연구)

  • 손현성;채승엽;염정덕
    • Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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    • 2002.11a
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    • pp.29-33
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    • 2002
  • Period which does an electric condition of panel in reset in the driving method of PDP is reset period. This research experimentally analyzed the priming discharge characteristic of reset period. The amount of wall charge and the accumulation time accumulated by priming discharge are unrelated to width of priming pulse. And, self-erase discharge has the relation in the amount of wall charge by priming discharge. Then, it relates also to space charge generated by priming discharge. Moreover, space charge which helps self-erase discharge exists to about 22$mutextrm{s}$ after generating priming discharge. And, it is suitable within 12$mutextrm{s}$ of priming pulse width for efficient reset.

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1.5 V Sub-mW CMOS Interface Circuit for Capacitive Sensor Applications in Ubiquitous Sensor Networks

  • Lee, Sung-Sik;Lee, Ah-Ra;Je, Chang-Han;Lee, Myung-Lae;Hwang, Gunn;Choi, Chang-Auck
    • ETRI Journal
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    • v.30 no.5
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    • pp.644-652
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    • 2008
  • In this paper, a low-power CMOS interface circuit is designed and demonstrated for capacitive sensor applications, which is implemented using a standard 0.35-${\mu}m$ CMOS logic technology. To achieve low-power performance, the low-voltage capacitance-to-pulse-width converter based on a self-reset operation at a supply voltage of 1.5 V is designed and incorporated into a new interface circuit. Moreover, the external pulse signal for the reset operation is made unnecessary by the employment of the self-reset operation. At a low supply voltage of 1.5 V, the new circuit requires a total power consumption of 0.47 mW with ultra-low power dissipation of 157 ${\mu}W$ of the interface-circuit core. These results demonstrate that the new interface circuit with self-reset operation successfully reduces power consumption. In addition, a prototype wireless sensor-module with the proposed circuit is successfully implemented for practical applications. Consequently, the new CMOS interface circuit can be used for the sensor applications in ubiquitous sensor networks, where low-power performance is essential.

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A Study on the Characteristics of Reset Discharge in the ADS Driving Method for the PDPs (PDP의 ADS 구동방식에서의 초기화 방전특성에 관한 연구)

  • 염정덕
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.17 no.2
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    • pp.17-22
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    • 2003
  • The priming discharge characteristic at the reset period in the ADS drive method of PDP was experimentally analyzed in this research. The amount of wall charge accumulated by the discharge and the accumulated time are unrelated to the priming pulse width. The self-erase discharge by excessive wall charge is related to the amount of wall charge by the priming discharge and this is related to space charge generated by the priming discharge. From the experimental result, in the optimized priming condition the plus width is 8$mutextrm{s}$ and the voltage is about 163V. The space charge which helps the self-erase discharge exists during about 16$mutextrm{s}$ immediately after generating the priming discharge. Therefore, it is suitable within 16$mutextrm{s}$ of the priming pluse width for the effective reset process.

The Susceptibility of LNA(Low Noise Amplifier) Due To Front-Door Coupling Under Narrow-Band High Power Electromagnetic Wave (안테나에 커플링되는 협대역 고출력 전자기파에 대한 저잡음 증폭기의 민감성 분석)

  • Hwang, Sun-Mook;Huh, Chang-Su
    • Journal of IKEEE
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    • v.19 no.3
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    • pp.440-446
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    • 2015
  • This study has examined susceptibility of LNA(Low Noise Amplifier) due to Front-Door Coupling under Narrow-Band high power electromagnetic wave. M/DFR(Malfunction/Destruction Failure Rate) was measured to investigate the diagnostic of IC test. In addition, decapsulation analysis was used to understand the inside of the chip state in LNA devices. The experiments is employed as an open-ended waveguide to study the destruction effects of LNA using a 2.45 GHz Magnetron as a high power electromagnetic wave. The susceptibility level of LNA was assessed by electric field strength, and its failure modes were observed. The malfunction of LNA device has showed as the type of self-reset and power-reset. The electric field strength of malfunction threshold is 524 V/m and 1150 V/m respectively. Also, he electric field of destruction threshold is 1530 V/m. Three types of damaged LNA were observed by decapsulation analysis: component, onchipwire, and bondwire destruction. Based on these results, the susceptibility of the LNA can be applied to a database to help elucidate the effects of microwaves on electronic equipment.

Automatic Recovery and Reset Algorithms for System Controller Errors

  • Lee, Yon-Sik
    • Journal of the Korea Society of Computer and Information
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    • v.25 no.3
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    • pp.89-96
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    • 2020
  • Solar lamp systems may not operate normally in the event of some system or controller failure due to internal or external factors, in which case secondary problems occur, which may cost the system recovery. Thus, when these errors occur, a technology is needed to recover to the state it was in before the failure occurred and to enable re-execution. This paper designs and implements a system that can recover the state of the system to the state prior to the time of the error by using the Watchdog Timer within the controller if a software error has occurred inside the system, and it also proposes a technology to reset and re-execution the system through a separate reset circuit in the event of hardware failure. The proposed system provides stable operation, maintenance cost reduction and reliability of the solar lamp system by enabling the system to operate semi-permanently without external support by utilizing the automatic recovery and automatic reset function for errors that occur in the operation of the solar lamp system. In addition, it can be applied to maintain the system's constancy by utilizing the self-operation, diagnosis and recovery functions required in various high reliability applications.

The Effect of Psychological Characteristics and Peer Acceptance on Korean Female Adolescents' Clothing Behavior (청소년기 여학생의 심리적 특성과 또래수용이 의복행동에 미치는 영향)

  • 김희창;이수경;고애란
    • Journal of the Korean Home Economics Association
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    • v.38 no.6
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    • pp.43-57
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    • 2000
  • The purposes of this study were 1) to identify the effects of psychological characteristics and peer acceptance on female adolescents'clothing behaviors(clothing attitudes and preference for up-to-date style), and 2) to determine the differences in psychological characteristics and clothing behaviors among subject groups classified by sociometric status. The questionnaires dealing with public/private self-consciousness, adolescent egocentrism, self-efficacy and clothing behaviors were adapted from precious studies. Peer acceptance was measured using Coie and Dodge(1983) method. The data were collected from 485 middle and high school girls living in Seoul, Korea. From the results of multiple regression of psychological characteristics and peer acceptance on clothing behaviors, clothing sexual attractiveness, clothing exhibition, and clothing importance were found to be influenced by public self-consciousness, adolescent egocentrism and peer acceptance. Fashion leadership and psychological dependence were influenced by egocentrism and self-efficacy. Preference for up-to-date style was influenced by egocentrism, public self-consciousness and self-efficacy. One-way ANOVA was used for analyzing the differences in research variables among subject groups classified by sociometric status. From the reset of middle school girls it was revealed that ignored group showed the highest score in clothing importance, whereas both popular group and rejected group showed the lowest score in social self-efficacy. In high school girls, controversial group showed the highest scores in adolescent egocentrism, fashion leadership, and preference for up-to-date style.

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Pd Shunt Resistor for Josephson Junction : Fabrication and Dynamic Simulation (Pd Shunt저항의 제작 및 동력학특성 조사)

  • 김규태;남두우;이규원;유광민
    • Proceedings of the Korea Institute of Applied Superconductivity and Cryogenics Conference
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    • 2003.02a
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    • pp.143-145
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    • 2003
  • External shunt resistor is used in Nb/AlOx/Nb Josephson junction which is basic component of RSFQ circuit. This is to increase damping and to make the so called 'self-reset' optimized for high speed operation. In this study, we fabricated and investigated sheet resistance of Pd and PdAu thin film, and simulated the inductance effect of the shunt resistor to the Josepshon junction dynamics.

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The Characteristics of Chalcogenide $Ge_1Se_1Te_2$ Thin Film for Nonvolatile Phase Change Memory Device (비휘발성 상변화메모리소자에 응용을 위한 칼코게나이드 $Ge_1Se_1Te_2$ 박막의 특성)

  • Lee, Jae-Min;Chung, Hong-Bay
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.55 no.6
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    • pp.297-301
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    • 2006
  • In the present work, we investigate the characteristics of new composition material, chalcogenide $Ge_1Se_1Te_2$ material in order to overcome the problems of conventional PRAM devices. The Tc of $Ge_1Se_1Te_2$ bulk was measured $231.503^{\circ}C$ with DSC analysis. For static DC test mode, at low voltage, two different resistances are observed. depending on the crystalline state of the phase-change resistor. In the first sweep, the as-deposited amorphous $Ge_1Se_1Te_2$ showed very high resistance. However when it reached the threshold voltage(about 11.8 V), the electrical resistance of device was drastically reduced through the formation of an electrically conducting path. The phase transition between the low conductive amorphous state and the high conductive crystal]me state was caused by the set and reset pulses respectively which fed through electrical signal. Set pulse has 4.3 V. 200 ns. then sample resistance is $80\sim100{\Omega}$. Reset pulse has 8.6 V 80 ns, then the sample resistance is $50{\sim}100K{\Omega}$. For such high resistance ratio of $R_{reset}/R_{set}$, we can expect high sensing margin reading the recorded data. We have confirmed that phase change properties of $Ge_1Se_1Te_2$ materials are closely related with the structure through the experiment of self-heating layers.