• Title/Summary/Keyword: scan driver

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Operation of NMOSFET-only Scan Driver IC for AC PDP (NMOSFET으로 구성된 AC PDP 스캔 구동 집적회로의 동작)

  • 김석일;정주영
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.40 no.7
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    • pp.474-480
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    • 2003
  • We designed and tested a new scan driver output stage. Compared to conventional CMOS structured scan driver IC′s, the new NMOSFET-only scan driver circuit can reduce the chip area and therefore, the chip cost considerably. We confirmed the circuit operation with open drain power NMOSFET IC′s by driving 2"PDP test panel. We defined critical device parameters and their optimization methods lot the best circuit performance.

Scanning System Stability for Improving SEM Image (전자현미경의 이미지 향상을 위한 주사시스템의 안정성)

  • Kim, Seung-Jae;Kim, Dong-Hwan
    • Journal of the Korean Society of Manufacturing Technology Engineers
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    • v.18 no.5
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    • pp.455-461
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    • 2009
  • In a scanning electron microscopy, image distortion is a critical issue and it is needed to be eliminated by some kinds of schemes. In this work, scanning frequency and scanning wave form are adjusted to have an improved image. The relationship between scan coil and its driver is investigated and appropriate frequency and wave form are suggested. It is proved that the selected frequency and wave form showed an enhanced image with less distortion, which were done by experiments. In addition, a noise elimination is addressed, providing improved image with a GROUND signal integration with the amplifier and the scan driver.

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Low Power 260k Color TFT LCD Driver IC

  • Kim, Bo-Sung;Ko, Jae-Su;Lee, Won-Hyo;Park, Kyoung-Won;Hong, Soon-Yang
    • ETRI Journal
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    • v.25 no.5
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    • pp.288-296
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    • 2003
  • In this study, we present a 260k color TFT LCD driver chip set that consumes only 5 mW in the module, which has exceptionally low power consumption. To reduce power consumption, we used many power-lowering schemes in the logic and analog design. A driver IC for LCDs has a built-in graphic SRAM. Besides write and read operations, the graphic SRAM has a scan operation that is similar to the read operation of one row-line, which is displayed on one line in an LCD panel. Currently, the embedded graphic memory is implemented by an 8-transistor leaf cell and a 6-transistor leaf cell. We propose an efficient scan method for a 6-transistor embedded graphic memory that is greatly improved over previous methods. The proposed method is implemented in a 0.22 ${\mu}m$ process. We demonstrate the efficacy of the proposed method by measuring and comparing the current consumption of chips with and without our proposed scheme.

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Low Cost Driving System for Plasma Display Panels by Eliminating Path Switches and Merging Power Switches

  • Lee, Dong-Myung;Hyun, Dong-Seok
    • Journal of Power Electronics
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    • v.7 no.4
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    • pp.278-285
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    • 2007
  • Recently, plasma display panels (PDP) have become the most promising candidate in the market for large screen size flat panel displays. PDPs have many merits such as a fast display response time and wide viewing angle. However, there are still concerns about high cost because they require complex driving circuits composed of high power switching devices to generate various voltage waveforms for three operational modes of reset, scan, and sustain. Conventional PDP driving circuits use path switches for voltage separation and a scan switch to offer a scan voltage for reset and scan operations, respectively. In addition, there exist reset switches to initialize PDPs by regulating the wall charge conditions with ramp shaped pulses, which means the necessity of specific power devices for the reset operation. Because power for the plasma discharge accompanied by a large current is transferred to a panel via path switches, high power rating switches are used for path switches. Therefore, this paper proposes a novel low-cost PDP driving scheme achieved by not only eliminating path switches but also merging the function of reset switches into other switches used for sustain or scan operations. The simulated voltage waveforms of the proposed topology and experimental results implemented in a 42-inch panel to demonstrate the validity of using a new gate driver that merges the functions of power switches are presented.

Low Power Consumption Scan Driver Using Depletion-Mode InGaZnO Thin-Film Transistors (공핍 모드 InGaZnO 박막 트랜지스터를 이용한 저소비전력 스캔 구동 회로)

  • Lee, Jin-Woo;Kwon, Oh-Kyong
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.49 no.2
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    • pp.15-22
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    • 2012
  • A low power consumption scan driver using depletion-mode n-type InGaZnO thin-film transistors is proposed. The proposed circuit uses 2 clock signals and generates the non-overlap output signals without the additional masking signals and circuits. The power consumption of the proposed circuit is decreased by reducing the number of the clock signals and short circuit current. The simulation results show that the proposed circuit operates successfully when the threshold voltage of TFT is varied from -3.0V to 1.0V. The proposed scan driver consumes 4.89mW when the positive and negative supply voltage is 15V and -5V, respectively, and the operating frequency is 46KHz on the XGA resolution panel.

Implementation and Evaluation of a Robot Operating System-based Virtual Lidar Driver (로봇운영체제 기반의 가상 라이다 드라이버 구현 및 평가)

  • Hwang, Inho;Kim, Kanghee
    • KIISE Transactions on Computing Practices
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    • v.23 no.10
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    • pp.588-593
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    • 2017
  • In this paper, we propose a LiDAR driver that virtualizes multiple inexpensive LiDARs (Light Detection and Ranging) with a smaller number of scan channels on an autonomous vehicle to replace a single expensive LiDAR with a larger number of scan channels. As a result, existing SLAM (Simultaneous Localization And Mapping) algorithms can be used with no modifications developed assuming a single LiDAR. In the paper, the proposed driver was implemented on the Robot Operating System and was evaluated with an existing SLAM algorithm. The results show that the proposed driver, combined with a filter to control the density of points in a 3D map, is compatible with the existing algorithm.

A New Scan Electrode Driving Circuit for an AC Plasma Display Panel

  • Yang, Jin-Ho;Kim, Joong-Kyun;Whang, Ki-Woong
    • 한국정보디스플레이학회:학술대회논문집
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    • 2000.01a
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    • pp.183-184
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    • 2000
  • A new driving circuit for scan electrode in AC PDP has been developed. The number of scan driver switches can be reduced to one half of the conventional circuit. Capacitance between the electrodes is utilized. Experiments and analysis of the new structure has been carried out to confirm its robustness.

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Fabrication of 24 GHz 3-Beam Scan Antenna for ACC Applications (자동 주행 차량을 위한 24 GHz 3-Beam Scan 안테나의 제작)

  • 원영진;이영주;공영균;김영수
    • Proceedings of the Korea Electromagnetic Engineering Society Conference
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    • 2002.11a
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    • pp.263-267
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    • 2002
  • For driver's convenience, the ACC (Adaptive Cruise Control) requires a system which controls the vehicle to keep the distance among the automobiles constant. This paper describes the microstrip array antennas designed to operate at 24 GHz, and used as a direction indicator of moving vehicles. $8{\times}2$ transmit away antenna with wide beamwidth, $8{\times}4$ receive center array antenna, and two $8{\times}8$ receive array antennas with narrow beamwidth were designed. The measured result shows that the designed array antennas arc suitable fur detecting 3 directions of the vehicle when the scan angle is within the restricted area.

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A New SOI LDMOSFET Structure with a Trench in the Drift Region for a PDP Scan Driver IC

  • Son, Won-So;Kim, Sang-Gi;Sohn, Young-Ho;Choi, Sie-Young
    • ETRI Journal
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    • v.26 no.1
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    • pp.7-13
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    • 2004
  • To improve the characteristics of breakdown voltage and specific on-resistance, we propose a new structure for a LDMOSFET for a PDP scan driver IC based on silicon-on-insulator with a trench under the gate in the drift region. The trench reduces the electric field at the silicon surface under the gate edge in the drift region when the concentration of the drift region is high, and thereby increases the breakdown voltage and reduces the specific on-resistance. The breakdown voltage and the specific on-resistance of the fabricated device is 352 V and $18.8 m{\Omega}{\cdot}cm^2$ with a threshold voltage of 1.0 V. The breakdown voltage of the device in the on-state is over 200 V and the saturation current at $V_{gs}=5V$ and $V_{ds}$=20V is 16 mA with a gate width of $150{\mu}m$.

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A Study on the Discharge Characteristics of an Ac PDP with the Variation of Scan Electrode Driver (PDP 스캔 전극 구동방식에 따른 방전 특성의 변화에 관한 연구)

  • Kim, Joong-Kyun
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.19 no.8
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    • pp.13-18
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    • 2005
  • The variation of discharge characteristics of an ac PDP was observed with the charge of scan electrode driving circuit. Conventional scan electrode driving circuit provides two switches per one scan line, and the suggested one can be constituted by one switch per one scan line with the consideration of capacitive load characteristic of an ac PDP. To verify the workability of the suggested scheme, the performances of the ac PDP was investigated. The dynamic voltage margin was slightly decreased with the adoption of the suggested scheme, which is estimated to result from the misfiring of unselected discharge cells due to the deformation of voltage level of the neighboring scan electrode. In the observation of the delay characteristics of addressing discharge, the performances of the conventional circuit and the suggested one are assumed to be equivalent.