• Journal of Sensor Science and Technology
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• v.8 no.3
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• pp.265-273
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• 1999

Various oxide films are commonly used as a sacrificial layer or etch mask in the fabrication of microelectromechanical systems (MEMS). Large residual strain of these oxide films causes the wafer to bow, which can have detrimental effects on photolithography and other ensuing processes. This paper investigates the residual strain of tetraethoxysilane (TEOS), low temperature oxide (LTO), 7 wt% and 10 wt% phosphosilicate glass (PSG). Euler beams and a bent-beam strain sensor are used to measure the residual strain. A poly silicon layer is used as the sacrificial layer, which is selectively etched away by $XeF_2$. First, the residual strain of as-deposited films is measured, which is quite large. The residual strain of the films is also measured after annealing them not only at $500^{\circ}C$, $600^{\circ}C$, $700^{\circ}$ and $800^{\circ}C$ in $N_2$ environment for 1 hour but also at the conditions for depositing a $2\;{\mu}m$ thick polysilicon at $585^{\circ}C$ and $625^{\circ}C$. Our results show that the 7 wt% PSG is best suited as the sacrificial layer for $2\;{\mu}$ thick polysilicon processes.

• Proceedings of the KIEE Conference
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• 1998.07g
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• pp.2518-2520
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• 1998

Silicon can be reactive ion etched (RIE) either isotropically or anisotropically. In this paper, a new micromachining technology combining these two etching characteristics is proposed. In the proposed method, the fabrication steps are as follows. First. a polysilicon layer, which is used as the bottom electrode, is deposited on the silicon wafer and patterned. Then the silicon substrate is etched anisotropically to a few micrometer depth that forms a cavity. Then an PECVD oxide layer is deposited to passivate the cavity side walls. The oxide layers at the top and bottom faces are removed while the passivation layers of the side walls are left. Then the substrate is etched again but in an isotropic etch condition to form a round trench with a larger radius than the anisotropic cavity. Then a sacrificial PECVD oxide layer is deposited and patterned. Then a polysilicon structural layer is deposited and patterned. This polysilicon layer forms a pivot structure of a rocker-arm. Finally, oxide sacrificial layers are etched away. This new micromachining technology is quite simpler than conventional method to fabricate joint structures, and the devices that are fabricated using this technology do not require a flexing structure for motion.

• Proceedings of the KIEE Conference
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• 1995.07c
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• pp.1442-1444
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• 1995

In this study, we confirmed that the crystallinity and the mechanical properties of polycrystalline Silicon(poly-Si) deposited on the poly-oxide are better than those of poly-Si on the conventional sacrificial layers that is CVD oxide layer or PSG. But the etch rate of poly-oxide is poor than that of the CVD oxide layer or PSG. Therefore, to make the best use of small stress and fast etch rate, we fabricated the double oxide layer; 10%-thick poly-oxide on 90%-thick CVD oxide or PSG. To estimate structure deformation by stress, we fabricated the test structures; cantilever. bridge and ring/beam structure and estimated by SEM. As the results, all structure is expressed the deformed structure by residual stress(tensile stress) and the deformation of the structure layer on the double oxide layer is small compared with that of the structure layer on the CVD oxide layer or PSG. And, the etch rate of the double oxide layer is enhanced compared with that of the poly-oxide.

• Proceedings of the KIEE Conference
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• 1988.07a
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• pp.328-331
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• 1988

Sealed Interface Local Oxidation (SILO) technology has been investigated using a nitride/oxide/nitride three-layered sandwich structure. P-type silicon substrate was either nitrided by rapid thermal processing, or silicon nitride was deposited by LPCVD method. A three-layered sandwich structure was patterned either by reactive ion etch (RIE) mode or by plasma mode. Sacrificial oxidation conditions were also varied. Physical characterization such as cross-section analysis of field oxide, and electrical characterization such as gate oxide integrity, junction leakage and transistor behavior were carried out. It was found that bird's beak was nearly zero or below 0.1um, and the junction leakages in plasma mode were low compared to devices of the same geometry patterned in RIE mode, and gate oxide integrity and transistor behavior were comparable. Conclusively, SILO process is compatible with conventional local oxidation process.

• Journal of Sensor Science and Technology
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• v.7 no.1
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• pp.73-82
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• 1998

In silicon surface micro-machining, the newly developed GPE(gas-phase etching) process was verified as a very effective method for the release of highly compliant micro-structures. The developed GPE system with anhydrous HF gas and $CH_{3}OH$ vapor was characterized and the selective etching properties of sacrificial layers to release silicon micro-structures were discussed. P-doped polysilicon and SOI(silicon on insulator) substrate were used as a structural layer and TEOS(tetraethyorthdsilicate) oxide, thermal oxide and LTO(low temperature oxide) as a sacrificial layer. Compared with conventional wet-release, we successfully fabricated micro-structures with virtually no process-induced striction and residual product.

• Journal of Sensor Science and Technology
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• v.9 no.3
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• pp.224-232
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• 2000

Aluminum metal process in surface micromachining enables to fabricate Al electrodes or Al structures, which improve electrical characteristics by reducing contact- and line-resistance or makes the whole process to be simple by using oxide as sacrificial layer. However, it is not possible to use conventional sacrificial layer etching process, because HF solution attacks aluminum as well as sacrificial oxide. The mixed solution of BHF and glycerine as an alternative shows the adequate properties to meet with this end. The exact etching properties, however, are sensitively depends on the geometry of the released structure, because the most etching process of sacrificial layer proceeds to the lateral direction in narrow space. Also, the surface roughness of aluminum affects to the etching characteristics. This paper reports experimental results on the effect of microstructure and surface roughness of aluminum to the etching properties. Considering these effects, we propose the optimized etching condition, which can be used practically for the fabrication of aluminum electrodes and microstructures by using standard surface micromachining process without modification or additional process.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.21 no.8
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• pp.711-714
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• 2008

Metal-oxide-semiconductor (MOS) capacitors were fabricated to investigate the plasma damage caused by reactive ion etching (RIE) on (100) oriented silicon-on-insulator (SOI) substrates. The thickness of the top-gate oxide, SOI, and buried oxide layers were 10 nm, 50 nm, and 100 nm, respectively. The MOS/SOI capacitors with an etch-damaged SOI layer were characterized by capacitance-voltage (C-V) measurements and compared to the sacrificial oxidation treated samples and the reference samples without etching. The measured C-V curves were compared to the numerical results from corresponding 2-dimensional (2-D) structures by using a Silvaco Atlas simulator.

• Korean Journal of Materials Research
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• v.12 no.5
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• pp.327-333
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• 2002

In order to obtain the oxidation layer for SiC MOS, the oxide layers by thermal oxidation process with dry and wet method were deposited and characterized. Deposition temperature for oxidation layer was $1100^{\circ}C$~130$0^{\circ}C$ by $O_2$ and Ar atmosphere. The oxide thickness, surface morphology, and interface characteristic of deposited oxide layers were measurement by ellipsometer, SEM, TEM, AFM, and SIMS. Thickness of oxidation layer was confirmed 50nm and 90nm to with deposition temperature at $1150^{\circ}C$ and $1200{\circ}C$ for dry 4 hours and wet 1 hour, respectively. For the high purity oxidation layer, the necessity of sacrificial oxidation which is etched for the removal of the defeats on the wafer after quickly thermal oxidation was confirmed.

• Proceedings of the Materials Research Society of Korea Conference
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• 2010.05a
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• pp.27.2-27.2
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• 2010

In recent years, there is a strong requirement of low cost, stable microelectro mechanical systems (MEMS) for resonators, microswitches and sensors. Most of these devices consist of freely suspended microcantilevers, which are usually made by the etching of some sacrificial materials. Herein, we have attempted to use Si nanowires, inherited from the parent Si wafer, as a sacrificial material due to its porosity, low cost and ease of fabrication. Prior to the fabrication of the Si nanowires silver nanoparticles were continuously formed on the surface of Si wafer. Vertically aligned Si nanowires were fabricated from the parent Si wafers by aqueous chemical route at $50^{\circ}C$. Afterwards, the morphological and structural characteristics of the Si nanowires were investigated. The morphology of nanowires was strongly modulated by the resistivity of the parent wafer. The 3-step etching of nanowires in diluted KOH solution was carried out at room temperature in order to control the fast etching. A layer of $Si_3N_4$ (300 nm) was used for the selective fabrication of nanowires. Finally, a freely suspended bridge of zinc oxide (ZnO) was fabricated after the removal of nanowires from the parent wafer. At present, we believe that this technique may provide a platform for the inexpensive fabrication of futuristic MEMS.

• IEIE Transactions on Smart Processing and Computing
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• v.4 no.5
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• pp.318-323
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• 2015

We present a new way to create a thermally stable, highly strained germanium (Ge) optical resonator using a novel Ge-on-dual-insulators substrate. Instead of using a conventional way to undercut the oxide layer of a Ge-on-single-insulator substrate for inducing tensile strain in germanium, we use thin aluminum oxide as a sacrificial layer. By eliminating the air gap underneath the active germanium layer, we achieve an optically insulating, thermally conductive, and highly strained Ge resonator structure that is critical for a practical germanium laser. Using Raman spectroscopy and photoluminescence experiments, we prove that the novel geometry of our Ge resonator structure provides a significant improvement in thermal stability while maintaining good optical confinement.