• Title/Summary/Keyword: resistor

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Propagation Characteristics of Ground Vibration Caused by Blast Hole Explosion of High Explosives in Granite (고위력 폭약의 화강암 내 장약공 폭발에 의한 지반진동 전파특성에 관한 연구)

  • Gyeong-Gyu Kim;Chan-Hwi Shin;Han-Lim Kim;Ju-Suk Yang;Sang-Ho Bae;Kyung-Jae Yun;Sang-Ho Cho
    • Explosives and Blasting
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    • v.41 no.4
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    • pp.29-40
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    • 2023
  • Rock blasting is utilized in various fields such as mining, tunneling, and the construction of underground structures. The role of rock blasting technology has became increasingly significant with the growing utilization of underground cavity. Blast hole pressure, generated during rock blasting, is a critical variable directly impacting factors such as crushing and blast vibration. It stands out as one of the most important parameters for assessing explosive performance and predicting blasting effects. While blast hole pressure has been studied by several researches, comparisons are challenging due to variations in experimental conditions such as explosive type, charge, and blasting conditions. In this study, blast hole pressure sensors and observation hole pressure sensors were developed to measure pressure during single-hole blasting, The experimental results were then used to discuss the propagation characteristics of pressure around the blast hole and the corresponding blast vibration.

LED Board Optimization Design for User-Friendly System Configuration (사용자 친화적 시스템 구성을 위한 LED 보드 최적화 설계)

  • Ju-An Park;Chang-Woo Han;Hui-Sang Yoo;Boong-Joo Lee
    • The Journal of the Korea institute of electronic communication sciences
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    • v.18 no.5
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    • pp.859-866
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    • 2023
  • This paper focuses on configuring a user-friendly system of LED systems by applying improvement measures such as gamma correction, non-flicker, and driving noise removal using MCUs and LED drivers. As a result of the experiment, the 22kHz PWM mode of the LED driver generated noise outside the audible frequency range, making it practically imperceptible to users. The appropriate pull-up resistor values within the normal operating delay ratio of 5% were found to be 1kΩ to 10kΩ for the 3kHz PWM mode and 1kΩ to 2kΩ for the 22kHz PWM mode. In addition, gamma correction can be optimized for nonlinear human visual systems to express accurate contrast and as a result, it is expected to develop an LED system that can be expressed more naturally and accurately than conventional LED systems and improve users' visual experience.

Development of a Temperature Sensor for OLED Degradation Compensation Embedded in a-IGZO TFT-based OLED Display Pixel (a-IGZO TFT 기반 OLED 디스플레이 화소에 내장되는 OLED 열화 보상용 온도 센서의 개발)

  • Seung Jae Moon;Seong Gyun Kim;Se Yong Choi;Jang Hoo Lee;Jong Mo Lee;Byung Seong Bae
    • Journal of Sensor Science and Technology
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    • v.33 no.1
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    • pp.56-61
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    • 2024
  • The quality of the display can be managed by effectively managing the temperature generated by the panel during use. Conventional display panels rely on an external reference resistor for temperature monitoring. However, this approach is easily affected by external factors such as temperature variations from the driving circuit and chips. These variations reduce reliability, causing complicated mounting owing to the external chip, and cannot monitor the individual pixel temperatures. However, this issue can be simply and efficiently addressed by integrating temperature sensors during the display panel manufacturing process. In this study, we fabricated and analyzed a temperature sensor integrated into an a-IGZO (amorphous indium-gallium-zinc-oxide) TFT array that was to precisely monitor temperature and prevent the deterioration of OLED display pixels. The temperature sensor was positioned on top of the oxide TFT. Simultaneously, it worked as a light shield layer, contributing to the reliability of the oxide. The characteristics of the array with integrated temperature sensors were measured and analyzed while adjusting the temperature in real-time. By integrating a temperature sensor into the TFT array, monitoring the temperature of the display became easier and more accurate. This study could contribute to managing the lifetime of the display.

Tuning for Temperature Coefficient of Resistance Through Continuous Compositional Spread Sputtering Method (연속 조성 확산 증착 방법을 통한 저항 온도 계수의 튜닝)

  • Ji-Hun Park;Jeong-Woo Sun;Woo-Jin Choi;Sang-Joon Jin;Jin-Hwan Kim;Dong-Ho Jeon;Saeng-Soo Yun;Jae-Il Chun;Jin-Ju Lim;Wook Jo
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.37 no.3
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    • pp.323-327
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    • 2024
  • The low-temperature coefficient of resistance (TCR) is a crucial factor in the development of space-grade resistors for temperature stability. Consequently, extensive research is underway to achieve zero TCR. In this study, resistors were deposited by co-sputtering nickel-chromium-based composite compositions, metals showing positive TCR, with SiO2, introducing negative TCR components. It was observed that achieving zero TCR is feasible by adjusting the proportion of negative TCR components in the deposited thin film resistors within certain compositions. Additionally, the correlation between TCR and deposition conditions, such as sputtering power, Ar pressure, and surface roughness, was investigated. We anticipate that these findings will contribute to the study of resistors with very low TCR, thereby enhancing the reliability of space-level resistors operating under high temperatures.

Development of Position Encoding Circuit for a Multi-Anode Position Sensitive Photomultiplier Tube (다중양극 위치민감형 광전자증배관을 위한 위치검출회로 개발)

  • Kwon, Sun-Il;Hong, Seong-Jong;Ito, Mikiko;Yoon, Hyun-Suk;Lee, Geon-Song;Sim, Kwang-Souk;Rhee, June-Tak;Lee, Dong-Soo;Lee, Jae-Sung
    • Nuclear Medicine and Molecular Imaging
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    • v.42 no.6
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    • pp.469-477
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    • 2008
  • Purpose: The goal of this paper is to present the design and performance of a position encoding circuit for $16{\times}16$ array of position sensitive multi-anode photomultiplier tube for small animal PET scanners. This circuit which reduces the number of readout channels from 256 to 4 channels is based on a charge division method utilizing a resistor array. Materials and Methods: The position encoding circuit was simulated with PSpice before fabrication. The position encoding circuit reads out the signals from H9500 flat panel PMTs (Hamamatsu Photonics K.K., Japan) on which $1.5{\times}1.5{\times}7.0\;mm^3$ $L_{0.9}GSO$ ($Lu_{1.8}Gd_{0.2}SiO_{5}:Ce$) crystals were mounted. For coincidence detection, two different PET modules were used. One PET module consisted of a $29{\times}29\;L_{0.9}GSO$ crystal layer, and the other PET module two $28{\times}28$ and $29{\times}29\;L_{0.9}GSO$ crystal layers which have relative offsets by half a crystal pitch in x- and y-directions. The crystal mapping algorithm was also developed to identify crystals. Results: Each crystal was clearly visible in flood images. The crystal identification capability was enhanced further by changing the values of resistors near the edge of the resistor array. Energy resolutions of individual crystal were about 11.6%(SD 1.6). The flood images were segmented well with the proposed crystal mapping algorithm. Conclusion: The position encoding circuit resulted in a clear separation of crystals and sufficient energy resolutions with H9500 flat-panel PMT and $L_{0.9}GSO$ crystals. This circuit is good enough for use in small animal PET scanners.

Comparative Analysis and Performance Evaluation of New Low-Power, Low-Noise, High-Speed CMOS LVDS I/O Circuits (저 전력, 저 잡음, 고속 CMOS LVDS I/O 회로에 대한 비교 분석 및 성능 평가)

  • Byun, Young-Yong;Kim, Tae-Woong;Kim, Sam-Dong;Hwang, In-Seok
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.45 no.2
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    • pp.26-36
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    • 2008
  • Due to the differential and low voltage swing, Low Voltage Differential Signaling(LVDS) has been widely used for high speed data transmission with low power consumption. This paper proposes new LVDS I/O interface circuits for more than 1.3 Gb/s operation. The LVDS receiver proposed in this paper utilizes a sense amp for the pre-amp instead of a conventional differential pre-amp. The proposed LVDS allows more than 1.3 Gb/s transmission speed with significantly reduced driver output voltage. Also, in order to further improve the power consumption and noise performance, this paper introduces an inductance impedance matching technique which can eliminate the termination resistor. A new form of unfolded impedance matching method has been developed to accomplish the impedance matching for LVDS receivers with a sense amplifier as well as with a differential amplifier. The proposed LVDS I/O circuits have been extensively simulated using HSPICE based on 0.35um TSMC CMOS technology. The simulation results show improved power gain and transmission rate by ${\sim}12%$ and ${\sim}18%$, respectively.

Impedance Spectroscopy Models for X5R Multilayer Ceramic Capacitors

  • Lee, Jong-Sook;Shin, Eui-Chol;Shin, Dong-Kyu;Kim, Yong;Ahn, Pyung-An;Seo, Hyun-Ho;Jo, Jung-Mo;Kim, Jee-Hoon;Kim, Gye-Rok;Kim, Young-Hun;Park, Ji-Young;Kim, Chang-Hoon;Hong, Jeong-Oh;Hur, Kang-Heon
    • Journal of the Korean Ceramic Society
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    • v.49 no.5
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    • pp.475-483
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    • 2012
  • High capacitance X5R MLCCs based on $BaTiO_3$ ceramic dielectric layers exhibit a single broad, asymmetric arc shape impedance and modulus response over the wide frequency range between 1 MHz to 0.01 Hz. Analysis according to the conventional brick-layer model for polycrystalline conductors employing a series connection of multiple RC parallel circuits leads to parameters associated with large errors and of little physical significance. A new parametric impedance model is shown to satisfactorily describe the experimental spectra, which is a parallel network of one resistor R representing the DC conductivity thermally activated by 1.32 eV, one ideal capacitor C exactly representing bulk capacitance, and a constant phase element (CPE) Q with complex capacitance $A(i{\omega})^{{\alpha}-1}$ with ${\alpha}$ close to 2/3 and A thermally activated by 0.45 eV or ca. 1/3 of activation energy of DC conductivity. The feature strongly indicate the CK1 model by J. R. Macdonald, where the CPE with 2/3 power-law exponent represents the polarization effects originating from mobile charge carriers. The CPE term is suggested to be directly related to the trapping of the electronic charge carriers and indirectly related to the ionic defects responsible for the insulation resistance degradation.

A Design of a Reconfigurable 4th Order ΣΔ Modulator Using Two Op-amps (2개의 증폭기를 이용한 가변 구조 형의 4차 델타 시그마 변조기)

  • Yang, Su-Hun;Choi, Jeong-Hoon;Yoon, Kwang Sub
    • Journal of the Institute of Electronics and Information Engineers
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    • v.52 no.5
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    • pp.51-57
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    • 2015
  • In this paper, in order to design the A / D converter with a high resolution of 14 bits or more for the biological signal processing, CMOS delta sigma modulator that is a 1.8V power supply voltage - were designed. we propose a new structure of The fourth order delta-sigma modulator that needs four op amps but we use only two op amps. By using a time -interleaving technique, we can re-construct the circuit and reuse the op amps. Also, we proposed a KT/C noise reduction circuit to reduce the thermal noise from a noisy resistor. We adjust the size of sampling capacitor between sampling time and integrating time, so we can reduce almost a half of KT/C noise. The measurement results of the chip is fabricated using a Magna 0.18um CMOS n-well1 poly 6 metal process. Power consumption is $828{\mu}W$ from a 1.8V supply voltage. The peak SNDR is measured as a 75.7dB and 81.3dB of DR at 1kHz input frequency and 256kHz sampling frequency. Measurement results show that KT/C noise reduction circuit enhance the 3dB of SNDR. FOM of the circuit is calculated to be 142dB and 41pJ / step.

A study on Protection Coordination Method for Electric Vehicle Charging Facility based on the Wireless Power Transmission (무선전력전송 전기충전설비용 전원공급장치의 최적운용방안에 관한 연구)

  • Ryu, Kyung-Sang;Kim, Byungki;Kim, Dae-Jin;Jang, Moon-Seok;Rho, Daeseok;Ko, Hee-Sang
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.18 no.9
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    • pp.42-51
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    • 2017
  • This paper deals with the power supply facility providing wireless power transmission for a type of electric vehicles called the on-line electric vehicle(OLEV) and proposes optimal protection coordination methods which analyze the faultsin the 60Hz and 20kHz bands using PSCAD/EMTDC, which is the typical commercial software for the distribution system. The simulation results show that the proposed methods can reduce the fault current by introducing an NGR (Neutral Ground Resistor) in the 60Hz band and prevent the malfunctioning of the protection device by installing a CT in the neutral wire in the 20kHz band when a ground fault occurs.

Effects of CaCO3 on the Defects and Grain Boundary Properties of ZnO-Co3O4-Cr2O3-La2O3 Ceramics (ZnO-Co3O4-Cr2O3-La2O3 세라믹스의 결함과 입계 특성에 미치는 CaCO3의 영향)

  • Hong, Youn-Woo;Ha, Man-Jin;Paik, Jong-Hoo;Cho, Jeong-Ho;Jeong, Young-Hun;Yun, Ji-Sun
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.31 no.5
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    • pp.307-312
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    • 2018
  • Liquid phases in ZnO varistors cause more complex phase development and microstructure, which makes the control of electrical properties and reliability more difficult. Therefore, we have investigated 2 mol% $CaCO_3$ doped $ZnO-Co_3O_4-Cr_2O_3-La_2O_3$ (ZCCLCa) bulk ceramics as one of the compositions without liquid phase sintering additive. The results were as follows: when $CaCO_3$ is added to ZCCLCa ($644{\Omega}cm$) acting as a simple ohmic resistor, CaO does not form a secondary phase with ZnO but is mostly distributed in the grain boundary and has excellent varistor characteristics (high nonlinear coefficient ${\alpha}=78$, low leakage current of $0.06{\mu}A/cm^2$, and high insulation resistance of $1{\times}10^{11}{\Omega}cm$). The main defects $Zn_i^{{\cdot}{\cdot}}$ (AS: 0.16 eV, IS & MS: 0.20 eV) and $V_o^{\bullet}$ (AS: 0.29 eV, IS & MS: 0.37 eV) were found, and the grain boundaries had 1.1 eV with electrically single grain boundary. The resistance of each defect and grain boundary decreases exponentially with increasing the measurement temperature. However, the capacitance (0.2 nF) of the grain boundary was ~1/10 lower than that of the two defects (~3.8 nF, ~2.2 nF) and showed a tendency to decrease as the measurement temperature increased. Therefore, ZCCLCa varistors have high sintering temperature of $1,200^{\circ}C$ due to lack of liquid phase additives, but excellent varistor characteristics are exhibited, which means ZCCLCa is a good candidate for realizing chip type or disc type commercial varistor products with excellent performance.