• Title/Summary/Keyword: resistor

Search Result 1,002, Processing Time 0.026 seconds

Comparison of Electricity Generation Efficiencies depending on the Reactor Configurations in Microbial Fuel Cells (미생물 연료 전지의 반응조 형상에 따른 전기 생산효율 비교)

  • Lee, Yunhee;Oa, Seong-Wook
    • Journal of Korean Society on Water Environment
    • /
    • v.26 no.4
    • /
    • pp.681-686
    • /
    • 2010
  • Two different MFC designs were evaluated in batch mode: single compartment combined membrane-electrodes (SCME) design and twin-compartment brush-type anode electrodes (TBE) design (single chamber with two air cathodes and brush anodes at each side of the reactor). In SCME MFC, carbon anode and cathode electrodes were assembled with a proton exchange membrane (PEM). TBE MFC was consisted of brush-type anode and carbon cloth cathode electrodes without the PEM. A brush-type anode was fabricated with carbon fibers and was placed close to the cathode electrode to reduce the internal resistance. Substrates used in this study were glucose, leachate from cattle manure, or sucrose at different concentrations with phosphate buffer solution (PBS) of 200 mM to increase the conductivity thereby reduce the internal resistance. Hydrogen generating bacteria (HGB) were only inoculated in TBE MFC. The peak power densities ($P_{peak}$) produced from the SCME systems fed with glucose and leachate were 18.8 and $28.7mW/m^2$ at external loads of 1000 ohms, respectively. And the $P_{peak}$ produced from TBE MFC were 40.1 and $18.3mW/m^2$ at sucrose concentration of 5 g/L and external loads of 470 ohms, with a mediator (2-hydroxy-1, 4-naphthoquinone) and without the mediator, respectively. The maximum power density ($P_{max}$) produced from mediator present TBE MFC was $115.3mW/m^2$ at 47 ohms of an external resistor.

A Design of Low-Power Wideband Bipolar Current Conveyor (CCII) and Its Application to Universal Instrumentation Amplifiers (저전력 광대역 바이폴라 전류 콘베이어(CCII)와 이를 이용한 유니버셜 계측 증폭기의 설계)

    • Journal of the Institute of Electronics Engineers of Korea SD
    • /
    • v.41 no.5
    • /
    • pp.143-152
    • /
    • 2004
  • A novel low-power wideband bipolar second-generation current conveyors(CCIIs) and its application to universal instrumentation amplifier(UIA) were proposed. The CCII for accuracy voltage or current transfer characteristics and low current input impedance adopted adaptive current bias circuit into conventional class Ab CCII. The UIA consists of only two CCIIs and four resistors. Three instrumentation function of the UIA can be realized by selection of input signals and resistors. The simulation results show that the CCII has input impedance of 2.0$\Omega$ and the voltage gain of 60㏈ for frequency range from 0 to 50KHz when used as a voltage amplifier. The CCII has also good characteristics of current follower for current range from -100㎃ to +100㎃. The simulation results show that the UIA has three instrumentation amplifier functions without resistor matching. The UIA has the voltage gain of 40㏈ for frequency range from 0 to 100KHz when used as a fully-differential instrumentation amplifier. The power dissipations of the CCII and the UIA are 0.75㎽ and 1.5㎽ at supply voltage of $\pm$2.5V, respectively.

Development of the Low Noise Amplifier for Cellular CDMA Using a Resistive Decoupling Circuit (저항 결합회로를 이용한 Cellular CDMA용 저잡음 증폭기의 구현)

  • 전중성;김동일
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.2 no.4
    • /
    • pp.635-641
    • /
    • 1998
  • This paper presents development of a small size LNA operating at 824 ∼ 849 MHz used for a receiver of a CELLULAR CDMA Base station and a transponder. Using resistive decoupling circuits, a signal at low frequency is dissipated by a resistor. This design method increases the stability of the LNA and is suitable for input stage matching. The LNA consists of low noise GaAs FET ATF-10136 and internally matched VNA-25. The LNA is fabricated with both the RF circuit and the self-bias circuits in aluminum housing. As a result, the characteristics of the LNA implemented here shows above 35dB in gain and below 0.9dB in noise figure, 18.6dBm P1dB power, a typical two tone IM3, -31.17dB with single carrier backed off 10dB from P1dB.

  • PDF

Investigation of miximum permitted error limits for second order sigma-delta modulator with 14-bit resolution (14 비트 분해능을 갖는 2차 Sigma-Delta 변조기 설계를 위한 구성요소의 최대에러 허용 범위 조사)

  • Cho, Byung-Woog;Choi, Pyung;Sohn, Byung-Ki
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.23 no.5
    • /
    • pp.1310-1318
    • /
    • 1998
  • Sigma-delta converter is frequently used for conyerting low-frequency anglog to digital signal. The converter consists of a modulator and a digital filer, but our work is concentrated on the modulator. In this works, to design second-order sigma-dalta modulator with 14bit resolution, we define maximumerror limits of each components (operational smplifier, integrator, internal ADC, and DAC) of modulator. It is first performed modeling of an ideal second-order sigma-delta modulator. This is then modified by adding the non-ideal factors such as limit of op-amp output swing, the finit DC gain of op-amp slew rate, the integrator gian error by the capacitor mismatch, the ADC error by the cmparator offset and the mismatch of resistor string, and the non-linear of DAC. From this modeling, as it is determined the specification of each devices requeired in design and the fabrication error limits, we can see the final performance of modulator.

  • PDF

Characteristics of Partial Discharge Under HVDC in SF6 Gas (SF6 가스 중 직류 고전압 하에서 부분방전 특성)

  • Kim, Min-Su;Kim, Sun-Jae;Jeong, Gi-Woo;Jo, Hyang-Eun;Kil, Gyung-Suk
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
    • /
    • v.27 no.4
    • /
    • pp.238-243
    • /
    • 2014
  • This paper dealt with the measurement and analysis of partial discharge (PD) under high voltage direct current (HVDC) in SF6 gas. Electrode systems such as a protrusion on conductor (POC), a protrusion on enclosure (POE), a crack on epoxy plate and a free particle (FP) were fabricated to simulate the insulation defects. The analysis system was designed with a Time-Frequency (T-F) map algorithm programed based on LabVIEW. This can arrange the acquired PD pulses into frequency and time domain. A HVDC power source is composed of a transformer (220 V/50 kV), a diode (100 kV) and a capacitor (50 kV, 0.5 ${\mu}F$). The gap between the electrodes is 3 mm, and the $SF_6$ gas was set at 5 bar. PD pulses were detected by a 50 ${\Omega}$ non-inductive resistor. In the analysis, PD pulses were distributed below 0.5 MHz and 20 ns ~ 35 ns for the POC, 0.7 MHz ~ 1.7 MHz, below 0.6 MHz and 10 ns ~ 40 ns and 60 ns ~125 ns for the POE, below 0.1 MHz and 135 ns ~ 215 ns for the crack, and below 1.6 MHz and 250 ns for the FP.

Control of the Bidirectional DC/DC Converter for a DC Distribution Power System in Electric Vehicles (전기 자동차의 DC 배전 시스템을 위한 양방향 DC/DC 컨버터의 제어)

  • Chang, Han-Sol;Lee, Joon-Min;Kim, Choon-Tack;La, Jae-Du;Kim, Young-Seok
    • The Transactions of The Korean Institute of Electrical Engineers
    • /
    • v.62 no.7
    • /
    • pp.943-949
    • /
    • 2013
  • Recently, an electric vehicle (EV) has been become a huge issue in the automotive industry. The EV has many electrical units: electric motors, batteries, converters, etc. The DC distribution power system (DPS) is essential for the EV. The DC DPS offers many advantages. However, multiple loads in the DC DPS may affect the severe instability on the DC bus voltage. Therefore, a voltage bus conditioner (VBC) may use the DC DPS. The VBC is used to mitigate the voltage transient on the bus. Thus, a suitable control technique should be selected for the VBC. In this research, Current controller with fixed switching frequency is designed and applied for the VBC. The DC DPS consist of both a resistor load and a boost converter load. The load variations cause the instability of the DC DPS. This instability is mitigated by the VBC. The simulation results by Matlab simulink and experimental results are presented for validating the proposed VBC and designed control technique.

A Study on Efficiency of Energy Conversion for a Piezoelectric Power Harvesting Using Polyvinylidene Fluorid Film (PVDF 필름을 이용한 효과적인 에너지 하베스팅에 관한 연구)

  • Hur, Won-Young;Lee, Tae-Yong;Lee, Kyung-Chun;Hwang, Hyun-Suk;Song, Joon-Tae
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
    • /
    • v.24 no.5
    • /
    • pp.422-426
    • /
    • 2011
  • Piezoelectric materials can be used to convert mechanical energy into electrical energy. In this study, we investigated the possibility of harvesting from mechanical vibration force using a high efficient piezoelectric material-polyvinylidene fluoride (PVDF). A piezoelectric energy harvesting system consists of rectifier, filter capacitor, resistance. The experiments were carried out with impacting force to PVDF film with the thickness of 1 ${\mu}m$. The output power was measured with change in the load resistance value from 100 ${\Omega}$ to 2.2 $M{\Omega}$. The highest power was obtained under optimization by selection of suitable resistive load and capacitance. A power of 0.3082 ${\mu}W/mm^2$ was generated at the external vibration force of 5 N (10 Hz) across a 1 $M{\Omega}$ optimal resistor. Also, the maximum power of 0.345 ${\mu}W/mm^2$ was generated at 22 ${\mu}F$ and 1 $M{\Omega}$. The developed system was expected at a solution to overcome the critical problem of making up small size energy harvester.

A Design of CMOS Analog-Digital Converter for High-Speed . Low-power Applications (고속 . 저전력 CMOS 아날로그-디지탈 변환기 설계)

  • Lee, Seong-Dae;Hong, Guk-Tae;Jeong, Gang-Min
    • The Transactions of the Korea Information Processing Society
    • /
    • v.2 no.1
    • /
    • pp.66-74
    • /
    • 1995
  • A 8-bit 15MHz CMOS subranging Analog-to-Digital converter for high-speed, low-power consumption applications is described. Subranging, 2 step flash, A/D converter used a new resistor string and a simple comparator architecture for the low power consumption and small chip area. Comparator exhibites 80dB loop gain, 50MHz conversion speed, 0.5mV offset and maximum error of voltage divider was 1mV. This Analog-to-Digital converter has been designed and fabricated in 1.2 m N-well CMOS technology. It consumed 150mW power at +5/-5V supply and delayed 65ns. The proposed Analog-to-Digital converter seems suitable for high- speed, low-power consumption, small area applications and one-chip mixed Analog- Digital system. Simulations are performed with PSPICE and a fabricated chip is tested.

  • PDF

Low-Cost Current Measurement Method for Vector Control of 2-Phase Induction Motor (2상 유도전동기의 벡터제어를 위한 저가형 전류측정 방법)

  • Oh, Kwang-Ho;Yoon, Duck-Yong
    • Journal of the Korea Academia-Industrial cooperation Society
    • /
    • v.16 no.1
    • /
    • pp.634-638
    • /
    • 2015
  • Phase currents should be measured in real time for vector control of a 2-phase induction motor. Generally, the phase currents of the motor are measured using two Hall current sensors installed at the output terminal of an inverter. Unfortunately, Hall current sensors are expensive and uneconomical because a vector-controlled inverter for 2-phase induction motor is mainly used in low-power and low-price applications. This paper proposes a low-cost current measurement method using two shunt resistors instead of expensive Hall current sensors. The proposed method can measure the phase currents under all operating conditions of the motor. This method was applied to an experimental vector-controlled inverter for 2-phase induction motor of 220[V]/360[W] and was verified through computer simulations and experimentation.

The Analysis of Quench Protection System through Thermo-Electrodynamics of Resistive Transition in SC Magnet (초전도자석내의 국부적 상변이에 대한 열적.전기역학적 해석 및 퀜치보호시스템의 설계 및 특성해석)

  • Chu, Y.;Bae, J.H.;Kim, H.M.;Jang, M.H.;Joo, M.S.;Ko, T.K.;Kim, K.M.;Jeong, S.K.
    • Proceedings of the KIEE Conference
    • /
    • 1997.07a
    • /
    • pp.86-88
    • /
    • 1997
  • The detection of the normal zones in the coil winding and the initiation of the proper dump sequence have been one of the most important areas in the superconducting magnet technology. In this paper, the process to derive optimal dump sequence has been investigated through quench simulation and analysis of magnetically coupled superconducting magnet system. The magnet terminal voltage and maximum temperature rise in the quench initiated point are calculated with respect to various input variables such as operation current, dump resistance, etc. The experimental system is comprised of sc solenoidal coil, data aquisition device, external circuit breakers and dump resistor. The quench behavior of the magnet(e.g., temperature profile and the voltage signal) was measured. From this results, theoretical predictions were found to coincide with the experimental observations.

  • PDF