• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.13 no.4
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• pp.273-279
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• 2000

Electrical repair method which has replaced laser repair method can replace defective cell by redundancy’s in the redundancy scheme of conventional high density memory. This electrical repair circuit consists of the antifuse program/read/latch circuits, a clock generator a negative voltage generator a power-up pulse circuit a special address mux and etc. The measured program voltage of made antifuses was 7.2~7.5V and the resistance of programmed antifuses was below 500 Ω. The period of clock generator was about 30 ns. The output voltage of a negative voltage generator was about 4.3 V and the current capacity was maximum 825 $mutextrm{A}$. An antifuse was programmed using by the electric potential difference between supply-voltage (3.3 V) and output voltage generator. The output pulse width of a power-up pulse circuit was 30 ns ~ 1$mutextrm{s}$ with the variation of power-up time. The programmed antifuse resistance required below 44 ㏀ from the simulation of antifuse program/read/latch circuit. Therefore the electrical repair circuit behaved safely and the yield of high densitymemory will be increased by using the circuit.

• Nuclear Engineering and Technology
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• v.46 no.4
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• pp.489-500
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• 2014

In this study, remote handling strategies for a large-scale argon cell facility were considered. The suggested strategies were evaluated by several types of field test. The teleoperation tasks were performed using a developed remote handling system, which enabled traveling over entire cell area using a bridge transport system. Each arm of the system had six DOFs (degrees of freedom), and the bridge transport system had four DOFs. However, despite the dexterous manipulators and redundant monitoring system, many operators, including professionals, experienced difficulties in operating the remote handling system. This was because of the lack of a strategy for handling the installed camera system, and the difficulty in recognizing the gripper pose, which might fall outside the FOV (field of vision) of the system during teleoperation. Hence, in this paper, several considerations for the remote handling tasks performed in the target facility were discussed, and the tasks were analyzed based on ergonomic factors such as the workload. Toward the development of a successful operation strategy, several ergonomic issues, such as active/passive view of the remote handling system, eye/hand alignment, and FOV were considered. Furthermore, using the method for classifying remote handling tasks, several unit tasks were defined and evaluated.

• ETRI Journal
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• v.27 no.6
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• pp.691-696
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• 2005

In asynchronous transfer mode (ATM) networks, fixed length cells of 53 bytes are transmitted. A cell may be discarded during transmission due to buffer overflow or a detection of errors. Cell discarding seriously degrades transmission quality. The quality degradation can be reduced by employing efficient forward error control (FEC) to recover discarded cells. In this paper, we present the design and implementation of decoding equipment for FEC in ATM networks based on a single parity check (SPC) product code using very-large-scale integration (VLSI) technology. FEC allows the destination to reconstruct missing data cells by using redundant parity cells that the source adds to each block of data cells. The functionality of the design has been tested using the Model Sim 5.7cXE Simulation Package. The design has been implemented for a $5{\times}5$ matrix of data cells in a Virtex-E XCV 3200E FG1156 device. The simulation and synthesis results show that the decoding function can be completed in 81 clock cycles with an optimum clock of 56.8 MHz. A test bench was written to study the performance of the decoder, and the results are presented.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.10
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• pp.105-113
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• 2004

This paper presents a design method for an asynchronous memory with a completion signal generation circuit meeting D-I model. The proposed design method is to generates a completion signal with dummy cell and a completion signal generation circuit to indicate completion of the required read or write operation to the processor. Dividing a memory exponentially to consider delay of a bit-line and a memory cell makes memory operates as a D-I model with minimum addition of redundant circuit. The proposed memory partitioning algorithm that divides entire memory into the several partitions with a exponentially increased size reduces the memory access delay by 40% compared with a conventional partitioning method to the same size.

• Molecules and Cells
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• v.44 no.5
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• pp.342-355
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• 2021

The microphthalmia-associated transcription factor family (MiT family) proteins are evolutionarily conserved transcription factors that perform many essential biological functions. In mammals, the MiT family consists of MITF (microphthalmia-associated transcription factor or melanocyte-inducing transcription factor), TFEB (transcription factor EB), TFE3 (transcription factor E3), and TFEC (transcription factor EC). These transcriptional factors belong to the basic helix-loop-helix-leucine zipper (bHLH-LZ) transcription factor family and bind the E-box DNA motifs in the promoter regions of target genes to enhance transcription. The best studied functions of MiT proteins include lysosome biogenesis and autophagy induction. In addition, they modulate cellular metabolism, mitochondria dynamics, and various stress responses. The control of nuclear localization via phosphorylation and dephosphorylation serves as the primary regulatory mechanism for MiT family proteins, and several kinases and phosphatases have been identified to directly determine the transcriptional activities of MiT proteins. In different immune cell types, each MiT family member is shown to play distinct or redundant roles and we expect that there is far more to learn about their functions and regulatory mechanisms in host defense and inflammatory responses.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.17 no.1
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• pp.11-20
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• 2007

A fast Montgomery multiplication occupies important to the design of RSA cryptosystem. Montgomery multiplication consists of two addition, which calculates using CSA or RBA. In terms of CSA, the multiplier is implemented using 4-2 CSA o. 5-2 CSA. In terms of RBA, the multiplier is designed based on redundant binary system. In [1], A new redundant binary adder that performs the addition between two binary signed-digit numbers and apply to Montgomery multiplier was proposed. In this paper, we reconstruct the logic structure of the RBA in [1] for reducing time and space complexity. Especially, the proposed RB multiplier has no coupler like the RBA in [1]. And the proposed RB multiplier is suited to binary exponentiation as modified input and output forms. We simulate to the proposed NRBA using gates provided from SAMSUNG STD130 $0.18{\mu}m$ 1.8V CMOS Standard Cell Library. The result is smaller by 18.5%, 6.3% and faster by 25.24%, 14% than 4-2 CSA, existing RBA, respectively. And Especially, the result is smaller by 44.3% and faster by 2.8% than the RBA in [1].

• 제어로봇시스템학회:학술대회논문집
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• 1997.10a
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• pp.1263-1266
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• 1997

In a fault-tolerant modern manufacturing systms characterized by the configuration, in which automated redundant machines prone to unexpected failures are interconnected with other complex subsystems such as AGV's, robots, computer control systems to produce complete parts, faulures together with repairs and reconfigurations should be considered as the three basic events to be modeled for computing the performance of manufacturing systems. In this papre, transient analysis is applied to modular cell manufacturing systems form a performability viewpoint whose modeling adantage is that various performanc e measures can be evaluated compositely in the context of application. The hypothertical modular cells are modeled firstly with hybrid decomposition method and availability measures as special cases of performability are computed and comments on performabililty modeling analysis are mentioned.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2002.05a
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• pp.551-554
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• 2002

The paper discusses new approach for machining operation simulation using enhanced Z map algorithm. To extract the required geometric information from NC code, suggested algorithm uses supersampling method to enhance the efficiency of a simulation process. By executing redundant Boolean operations in a grid cell and averaging down calculated data, presented algorithm can accurately represent material removal volume though tool swept volume is negligibly small. Supersampling method is the most common form of antialiasing and usually used with polygon mesh rendering in computer graphics. The key advantage of enhanced Z map model is that the data structure is same with conventional Z map model, though it can acquire higher accuracy and reliability with same or lower computation time. By simulating machining operation efficiently, this system can be used to improve the reliability and efficiency of NC machining process as well as the quality of the final product.

• Journal of Power Electronics
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• v.10 no.1
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• pp.34-42
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• 2010

Reliability is an important issue in cascaded H-bridge converters (CHB converters) because they use a high number of power semiconductors. A faulty power cell in a CHB converter can potentially lead to expensive downtime and great losses on the consumer side. With a fault-tolerant control strategy, operation can continue with the undamaged cells; thus increasing the reliability of the system. In this paper, the operating principles and the control method for a CHB multilevel rectifier are introduced. The influence of various faults on the CHB converter is investigated. The method of fault diagnosis and the bypassing of failed cells are explained. A fault-tolerant protection strategy is proposed to achieve redundancy in the CHB rectifier. The redundant H-bridge concept helps to deal with device failures and to increase system reliability. Simulation results verify the performance of the proposed strategy.

• ETRI Journal
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• v.18 no.4
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• pp.215-227
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• 1997

We propose a new method to eliminate completely the redundant elements in a CDMA (code division multiple access) mobile system. First, we define multilevel logic operation (MLO), which is a new concept to deal with the multilevel logic signals. We prove that the conventional binary logic concept is a subset of the MLO concept. The multilevel logic signal can be directly controlled by using this MLO in place of the binary operation. We applied the MLO to the CDMA base station modulator (BSM) in order to reduce the hardware complexity. In the case of a 3-sectorized cell, this method helps reduce the complexity down the level of below 1% of the conventional CDMA BSM for spreading and filtering, and to 50% for Walsh covering.