• Proceedings of the Korean Information Science Society Conference
• /
• 2003.10a
• /
• pp.208-210
• /
• 2003

본 논문은 SOC 내에 존재하는 코아들을 테스트하는 과정에서 개별 코아들의 테스트 조건을 기반으로 한 스케듈링을 통해 최적의 Test ing time을 구하는 연구이다. SOC 내에 존재하는 코아들은 주어지는 TAM(Test Access Mechanism) Width에 따라 각코아들의 Width가 달라지고, 최대 Width에서 최소 Width(1)까지 각 Width 별로 Testing time을 계산할 수 있다. 코아들의 각 Width 별 Testing time을 기존의 Rectangle Packing Algorithm을 수정, 보완하여 효율적으로 구성한 수정 Rectangle Packing Algorithm에 적응하여 최적의 Testing time을 구하는 것이 본 논문의 목적이다.

• KIPS Transactions on Software and Data Engineering
• /
• v.9 no.3
• /
• pp.83-90
• /
• 2020

Prototype selection offers the advantage of ensuring low learning time and storage space by selecting the minimum data representative of in-class partitions from the training data. This paper designs a new training data generation method using hyper-rectangles that can be applied to general classification algorithms. Hyper-rectangular regions do not contain different class data and divide the same class space. The median value of the data within a hyper-rectangle is selected as a prototype to form new training data, and the size of the hyper-rectangle is adjusted to reflect the data distribution in the class area. A set cover optimization algorithm is proposed to select the minimum prototype set that represents the whole training data. The proposed method reduces the time complexity that requires the polynomial time of the set cover optimization algorithm by using the greedy algorithm and the distance equation without multiplication. In experimented comparison with hyper-sphere prototype selections, the proposed method is superior in terms of prototype rate and generalization performance.

• Journal of Advanced Navigation Technology
• /
• v.10 no.4
• /
• pp.385-393
• /
• 2006

In this paper, we proposed a location estimation algorithm considering an extension of searching area in 2.45GHz band RTLS and analyzed its performance in terms of an average estimation error distance. The extendable searching area was assumed to be square of $300m{\times}300m$ and 2 dimensions. The arrangement shape of available readers was considered circle, rectangle, and shrinkage rectangle for extendable searching area. Also, we assumed that propagation path was LOS (Line-Of-Sight) environment, and analyzed the estimation error performance as a function of the number of received sub-blink considering an arrangement shape of available readers in searching area. From the results, compared with rectangle shape, circle shape showed the higher estimation accuracy. Also, we confirmed that the proposed location estimation algorithm provided high estimation accuracy in the shrinkage rectangle shape that was suitable for extension of searching area.

• Journal of the Korean Society for Advanced Composite Structures
• /
• v.4 no.1
• /
• pp.1-8
• /
• 2013

The finite element analysis (FEA) is a numerical technique to find solutions of field problems. A field problem is approximated by differential equations or integral expressions. In a finite element, the field quantity is allowed to have a simple spatial variation in terms of linear or polynomial functions. This paper represents a review and an accuracy-study of the finite element method comparing the FEA results with the exact solution. The exact solutions were calculated by solid mechanics and FEA using matrix stiffness method. For this study, simple bar and cantilever models were considered to evaluate four types of basic elements - constant strain triangle (CST), linear strain triangle (LST), bi-linear-rectangle(Q4),and quadratic-rectangle(Q8). The bar model was subjected to uniaxial loading whereas in case of the cantilever model moment loading was used. In the uniaxial loading case, all basic element results of the displacement and stress in x-direction agreed well with the exact solutions. In the moment loading case, the displacement in y-direction using LST and Q8 elements were acceptable compared to the exact solution, but CST and Q4 elements had to be improved by the mesh refinement.

• Journal of the Korea Institute of Information Security & Cryptology
• /
• v.15 no.3
• /
• pp.115-126
• /
• 2005

SHACAL-2 is a 256-bit block cipher with up to 512 bits of key length based on the hash function SHA-2. It was submitted to the the NESSIE project and was recommended as one of the NESSIE selections. In this paper, we present two types of related-key attacks called the related-key differential-(non)linear and the related-key rectangle attacks, and we discuss the security of SHACAL-2 against these two types of attacks. Using the related-key differential-nonlinear attack, we can break SHACAL-2 with 512-bit keys up to 35 out of its 64 rounds, and using the related-key rectangle attack, we can break SHACAL-2 with 512-bit keys up to 37 rounds.

• The Journal of the Institute of Internet, Broadcasting and Communication
• /
• v.24 no.1
• /
• pp.103-107
• /
• 2024

This paper is a study on a triangle patch antenna using a rectangle slot and strip conductor. The length and spacing of the slot were adjusted to confirm the characteristics of the triangle patch antenna with rectangle slot, and the area and shape of the radiation patch were changed to triangle, rectangle, and hexagon for impedance matching. The HFSS simulator was used to check the antenna parameter characteristics, and the antenna size was 26 mm ×26 mm. In this proposed antenna, the simulation frequency range with VSWR of 2 or less was 5.27 to 6.24 GHz. The bandwidth was 970 MHz. The frequency range of the fabricated antenna was 5.24 to 6.38 GHz, and the bandwidth 1140 MHz. The maximum radiation gain is 5.01 dBi. It was confirmed that all radiation patterns had directional characteristics.

• Journal of KIISE:Computer Systems and Theory
• /
• v.27 no.1
• /
• pp.109-115
• /
• 2000

In this paper, we propose a new method for power estimation in nodes of multi-level combinational circuits and describe its application to the extraction of common expressions for low power design. Extracting common expressions which is accomplished mostly by the extraction of kernels and common cubes, can be transformed to the problem of rectangle covering. We describe how the newly proposed estimation method can be applied to the rectangle covering problem and show the experimental results with comparisons to the results of SIS-1.2.

• ETRI Journal
• /
• v.28 no.4
• /
• pp.475-485
• /
• 2006

Network-on-chip (NoC) is an emerging design paradigm intended to cope with future systems-on-chips (SoCs) containing numerous built-in cores. Since NoCs have some outstanding features regarding design complexity, timing, scalability, power dissipation and so on, widespread interest in this novel paradigm is likely to grow. The test strategy is a significant factor in the practicality and feasibility of NoC-based SoCs. Among the existing test issues for NoC-based SoCs, test access mechanism architecture and test scheduling particularly dominate the overall test performance. In this paper, we propose an efficient NoC-based SoC test scheduling algorithm based on a rectangle packing approach used for current SoC tests. In order to adopt the rectangle packing solution, we designed specific methods and configurations for testing NoC-based SoCs, such as test packet routing, test pattern generation, and absorption. Furthermore, we extended and improved the proposed algorithm using multiple test clocks. Experimental results using some ITC'02 benchmark circuits show that the proposed algorithm can reduce the overall test time by up to 55%, and 20% on average compared with previous works. In addition, the computation time of the algorithm is less than one second in most cases. Consequently, we expect the proposed scheduling algorithm to be a promising and competitive method for testing NoC-based SoCs.

• Journal of Educational Research in Mathematics
• /
• v.13 no.1
• /
• pp.57-75
• /
• 2003

The goal of this paper is to offer material which make mathematising Fruedenthal(1991) proposed be experienced through the process of teaching and learning mathematics. In this paper, the number of unit squares a diagonal passes through for an m$\times$n lattice rectangle is studied and its generalization is discussed. Through this discussion, the adaptability of this material Is analysed. Especially, beyond inductional conjecture, the number of unit squares is studied by more complete way, and generalization in 3-dimension and 4-dimension are tried. In school mathematics, it is enough to generalize in 3-dimension. This material is basically appropriate for teaching and learning mathematising in math classroom. In studying the number of unit squares and unit cubes, some kinds of mathematising are accompanied. Enough time are allowed for students to study unit squares and unit cubes to make them experience mathematising really. To do so, it is desirable to give students that problem as a task, and make them challenge that problem for enough long time by their own ways. This material can be connected to advanced mathematics naturally in that it is possible to generalize this problem in n-dimension. So, it is appropriate for making in-service mathematics teachers realize them as a real material connecting school mathematics and advanced mathematics.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.45 no.2
• /
• pp.93-100
• /
• 2008

In this paper, we address a novel simulated annealing(SA)-based test scheduling method for testing network-on-chip (NoC)-based systems-on-chip(SoCs), on the assumption that the test platform proposed in [1] is installed. The proposed method efficiently mixed the rectangle packing method with SA and improved the scheduling results by locally changing the test access mechanism(TAM) widths for cores and the testing orders. Experimental results using ITC'02 benchmark circuits show that the proposed algorithm can efficiently reduce the overall test time.