• Proceedings of the Korean Vacuum Society Conference
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• 2012.02a
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• pp.446-446
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• 2012

최근 반도체 칩의 트랜지스터 집적화 기술이 발달됨에 따라 dynamic random access memory(DRAM)의 memory cell 영역을 작게 만들어야 하는 문제가 제기되고 있다. 이러한 문제점을 해결하기 위해서 대체 기술이 끊임없이 연구되고 있는 가운데 하나의 트랜지스터와 하나의 캐패시터로 구성된 기존의 DRAM에서 캐패시터가 없이 하나의 트랜지스터만으로 이루어진 1T-DRAM 소자의 연구가 활발히 진행되고 있다. 이는 기존 DRAM의 구조에 비해 캐패시터가 필요하지 않아 복잡한 공정이 줄어들어 소자 제작이 용이하며, 더 높은 집적도를 구현할 수 있는 장점이 있다. 일반적인 planar 타입의 1T-DRAM의 경우 소스 및 드레인과 기판과의 접합면에서 누설 전류가 큰 특징을 가지며 소자의 집적화에 따른 단 채널 효과가 발생하게 되는데, 본 연구에서는 이러한 문제점을 해결하기 위해서 유효 채널 길이를 늘려 단 채널 효과에 의한 영향을 감소시키고, 소스 및 드레인과 기판과의 접합면을 줄여 누설 전류를 줄일 수 있는 recessed 채널 타입의 1T-DRAM을 제작하였다. 1T-DRAM의 메모리 구동방법에는 여러 가지가 있는데 본 연구에서는 impact ionization (II)을 이용한 방법과 gate induced drain leakage (GIDL)을 이용한 방법을 사용하여 1T-DRAM의 채널구조에 따라 어떠한 구동방법이 더 적합한지 평가하였고, 그 결과 recessed 채널 1T-DRAM의 동작은 II 에 의한 측정 방법이 더 적합한 것으로 보여졌다.

• Proceedings of the Materials Research Society of Korea Conference
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• 1999.05a
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• pp.110-110
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• 1999

• JSTS:Journal of Semiconductor Technology and Science
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• v.15 no.1
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• pp.16-21
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• 2015

In this study, the effects of forming gas post metallization annealing (PMA) on recessed AlGaN/GaN-on-Si MOSHFET were investigated. The device employed an ICPCVD $SiO_2$ film as a gate oxide layer on which a Ni/Au gate was evaporated. The PMA process was carried out at $350^{\circ}C$ in forming gas ambient. It was found that the device instability was improved with significant reduction in interface trap density by forming gas PMA.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.25 no.2
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• pp.96-99
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• 2012

We fabricated fully depleted (FD) SOI-based 1T-DRAM cells with planar channel or recessed channel and the electrical characteristics were investigated. In particular, the dependence of memory operating mode on the channel structure of 1T-DRAM cells was evaluated. As a result, the gate induced drain leakage current (GIDL) mode showed a better memory property for planar type 1T-DRAM. On the other hand, the impact ionization (II) mode is more effective for recessed type.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.29A no.2
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• pp.77-79
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• 1992

We propose a self-aligned and double recessed technique for GaAs power MESFETs application. The gate length and the wide recess width are defined by a selective removal of the SiN layer using reactive ion etching(RIE) while the depth of the channel is defined by chemical etching of GaAs layers. The threshold voltages and the saturation drain voltage could be sucessfully controlled using this technique. The lateral-etched distance increases with the dry etching time and the source-drain breakdown voltage of MESFET increases up to about 30V at a pinch-off condition. The electrical characteristics of a MESFET with a gate length of 2 x10S0-6Tm and a source-gate spacing of 33 x10S0-6Tm show maximum transconductance of 120 mS/mm and saturation drain current density of 170-190mA/mm at a gate voltage of 0.8V.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.11b
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• pp.238-242
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• 2001

In this paper, the current-voltage characteristics of a 4H-SiC MESFET is simulated by using the Atlas Simulation tool. we are able to use the simulator to extract more information about the new material 4H-SiC, including the mobility, velocity-field Curve and the Schottky barrier height. We have enabled and used the new simulator to investigate breakdown Voltage and thus predict operation limitiations of 4H-SiC device. Modeling results indicate that the Breakdown Voltage is 197 V and Current is 100 mA

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.11a
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• pp.238-242
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• 2001

In this paper, the current-voltage characteristics of a 4H-SiC MESFET is simulated by using the Atlas Simulation tool. we are able to use the simulator to extract more information about the new material 4H-SiC, including the mobility, velocity-field Curve and the Schottky barrier height. We have enabled and used the new simulator to investigate breakdown Voltage and thus predict operation limitations of 4H-SiC device. Modeling results indicate that the Breakdown Voltage is 197 V and Current is 100 mA

• Proceedings of the Materials Research Society of Korea Conference
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• 2000.11a
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• pp.58-58
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• 2000

• JSTS:Journal of Semiconductor Technology and Science
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• v.17 no.3
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• pp.354-362
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• 2017

We investigated the improvement in electrical characteristics of large AlGaN/GaN on Si Schottky barrier diode (SBD) induced by structural change to achieve a better trade-off between the forward and reverse performance to obtain high power conversion efficiency in PFC converter. Using an optimized dry etch condition for a large device, we fabricated three-types of SBD with 63 mm channel width: conventional, recessed, recessed dual-anode-metal SBD. The recessed dual-anode-metal SBD exhibited a very low turn-on voltage of 0.34 V, a high forward current of 1.63 A at 1.5 V, a leakage current of $114{\mu}A$ at -15 V, a breakdown voltage of 794 V.

• Proceedings of the Materials Research Society of Korea Conference
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• 1999.11a
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• pp.202-202
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• 1999

No Abstract.see full/text