• Journal of the Korean Institute of Telematics and Electronics
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• v.27 no.1
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• pp.81-90
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• 1990

In this study, ion beam deposited tungsten thin film for gate material of GaAs SAGFET(Self Aligned Gate FET) was annealed from 800\ulcorner to 900\ulcorner using RTA and detailed investigations of structural and electrical characteristics of this film were carried out using four-point probe, XRD, SEM, AES and current-voltage measurement. Investigated results showed phase of as deposited tungsten film was fine grain \ulcornerphase and phase tdransformation of this film into \ulcornerphase occured at annealing condition of 900\ulcorner, 6sec. But regardless of phase transformation, electrical characteristics of tungsten film were very stable to 900\ulcorner and in case of 900\ulcorner, 4sec annealing condition Schottky barrier height obtained from 10 diodes measurements was 0.66 + 0.003 eV.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.10 no.1
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• pp.42-47
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• 2000

The surface structure and the crystalline features in the near surface region have been investigated for CZ(Czochralski) grown Si wafers. Si wafers were annealed by RTA (Rapid Thermal Annealing) method in H$_2$ambient after mirror polished process. The densities of COPs (Crystal Originated Particles) after RTA process were remarkably decreased at the surface and in the region of 5um depth from the surface as well. terrace type surface structure which was formed by etching and re-arrangement of Si atoms during $H_2$annealing process also has been observed.

• Proceedings of the KIEE Conference
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• 2000.07c
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• pp.1477-1479
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• 2000

The annealing treatments on rf magnetron sputtered PZT($Pb_{1.05}(Zr_{0.52},Ti_{0.48})O_3$) thin films(4000${\AA}$) have been investigated for a structure of PZT/Pt/Ti/ITO coated glass. Crystallization properties of PZT films were strongly dependent on RTA(Rapid Thermal Annealing) annealing temperature and time. We were able to obtain a perovskite structure of PZT at 650$^{\circ}C$ and 10min. P-E curves of Pd/PZT/Pt capacitor demonstrate typical hysteresis loops. The measured values of $P_r$, $E_c$ were 15.8[${\mu}C/cm^2$], 95[kV/cm] respectively. Polarization value decrease about 10% after $10^9$ cycles.

• Proceedings of the Korean Vacuum Society Conference
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• 2007.08a
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• pp.264-264
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• 2007

• JSTS:Journal of Semiconductor Technology and Science
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• v.17 no.2
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• pp.283-287
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• 2017

Recently, Ni-InGaAs has been required for high-performance III-V MOSFETs as a promising self-aligned material for doped source/drain region. As downscaling of device proceeds, reduction of contact resistance ($R_c$) between Ni-InGaAs and n-InGaAs has become a challenge for higher performance of MOSFETs. In this paper, we compared three types of sample, vacuum, 2% $H_2$ and 4% $H_2$ annealing condition in rapid thermal annealing (RTA) step, to verify the reduction of $R_c$ at Ni-InGaAs/n-InGaAs interface. Current-voltage (I-V) characteristic of metal-semiconductor contact indicated the lowest $R_c$ in 4% $H_2$ sample, that is, higher current for 4% $H_2$ sample than other samples. The result of this work could be useful for performance improvement of InGaAs n-MOSFETs.

• Journal of the Korean Vacuum Society
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• v.11 no.4
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• pp.201-206
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• 2002

Pd/Si/Pd/Ti/Au ohmic contact to n-type InGaAs was investigated with rapid thermal annealing conditions. Minimum specific contact resistivity of $3.9\times10^{-7}\Omega\textrm{cm}^2$ was achieved at $400^{\circ}C$/20sec. This was related to the formation of Pd-Si compounds by rapid thermal annealing and the in-diffusion of Si atoms to InGaAs surface. However, the specific contact resistivity increased slightly to low-$10^{-6}\Omega \textrm{cm}^2$ at $400^{\circ}C$ for longer than 30 seconds, and to high-$10^{-7}$ at 425~$450^{\circ}C$ for 10 seconds. This resulted from the formation of Pd-Ga compounds. Superior ohmic contact and non-spiking planar interface between ohmic materials and InGaAs were maintained after annealing at high temperature. Therefore, this thermally stable ohmic contact system is a promising candidate for compound semiconductor devices.

• Journal of IKEEE
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• v.24 no.2
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• pp.604-609
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• 2020

We investigated the influence of rapid thermal annealing on aluminum nitride (AlN) thin film Schottky barrier diodes (SBDs) manufactured structures deposited on a 4H-silicon carbide (SiC) wafer using radio frequency sputtering. The Ni/AlN/4H-SiC devices annealed at 400℃ exhibited Schottky barrier diode (SBDs) properties with an on/off current ratio that was approximately 10 times higher than that of the as-deposited device structures and the devices annealed at 600℃ as measured at room temperature. Auger electron spectroscopy (AES) measurements revealed that atomic oxygen concentrations in the annealed AlN devices at 400℃, is ascribed to the improvement in on/off ratio and the reduction of on-resistance. Additionally, we investigated the electrical characteristics of the AlN/SiC SBD structures depending on the frequency variation of sound waves.

• Korean Journal of Materials Research
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• v.1 no.4
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• pp.191-197
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• 1991

The surface roughnesses of titanium silicide films and the diffusion behaviours of dopants in single crystal and polycrystalline silicon substrates durng titanium silicide formation by rapid thermal annealing(RTA) of sputter deposited Ti-filicide film from the composite $TiSi_{2.6}$ target were investigated by the secondary ion mass spectrometry(SIMS), a four-point probe, X-ray diffraction, and surface roughness measurements. The as-deposited films were amorphous but film prepared on single silicon substrate crystallized to the orthorhombic $TiSi_2$(C54 structure) upon rapid thermal annealing(RTA) at $800^{\circ}C$ for 20sec. There was no significant out-diffusion of dopants from both single crystal and polycrystalline silicon substrate into titanum silicide layers during annealing. Most of the implanted dopants piled up near the titanium silicide/silicon interface. The surface roughnesses of titanium silicide films were in the range between 16 and 22nm.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.13 no.4
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• pp.312-317
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• 2000

Ferroelectric S $r_{0.9}$/B $i_{2.1}$/T $a_{2}$/ $O_{9}$ solutions were synthesized using sol-gel process in which strontinum ethoxide bismuth ethoxide trantalum ethoxide were used a s startring materials. SBT thin films were coated on Pt/Ti/ $SiO_2$/Si substrates by spin-coating. rapid thermal annealing (RTA) was used to promote crystallization. Thin films were annealed at $700^{\circ}C$ for 1 hr in an oxygen atmosphere. This temperature is about 10$0^{\circ}C$ lower than the usual annealing temperature for SBT thin films. Pt top-electrode was deposited by sputtering and thin films were post-annealed at $700^{\circ}C$ for 30 min. to enhance electrical properties. As the RTA temperature increased the higher 2 $P_{r}$ values were obtained. At RTA temperature being 78$0^{\circ}C$ remanent polarization of S $r_{0.9}$/B $i_{2.1}$/T $a_{2}$/ $O_{9}$ thin film was 7.73 $\mu$C/cm $_2$ and the leakage current density was 1.14$\times$10$^{-7}$ A/c $m^2$ at 3 V. As RTA temperature increased the breakdown voltage was decreased. It is considered that the low-field breadown is caused by the rough surface of SBT films and forming bismuth metal in SBT thin films.films.lms.

• Proceedings of the KIEE Conference
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• 1988.07a
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• pp.387-390
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• 1988

The increases in the packing density and the resulting shrinkage of silicon integrated circuit dimensions led to the investigation and successful of the deposited silicide layers as the gate and interconnection and contact metallization. In this paper evaporated Co films on n-Si have been rapid thermal annealed in $N_2$ambient at temperature of $400^{\circ}C-1000^{\circ}C$. The Co silicide formation is characterized by sheet resistance (4PP). Also, silicide growth rate and its reproductivity has been examined by SEM.