• 한국표면공학회지
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• 제32권3호
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• pp.289-296
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• 1999

The integration of the LSI has been greatly improved and the circuit patters on the LSI are becoming finer line and pitch. The high-density electronic packaging technology is improved. In order to realize the high-density packaging technology, the density of the circuit wiring of the printed circuit boards have also been more dense. The build-up process multilayer printed circuit board technology have a lot of vias, possibilities of the finer conductor wirings and have a freedom of capabilities of wiring design. The build-up process printed circuit boards have the wiring rules which are the pattern width: $100-20\mu\textrm{m}$, the via hole diameter: $100-50\mu\textrm{m}$. There three kinds of build-up processes as far materials and hole drilling. In this paper, the recent technology trends of the build-up printed circuit board technologies are described.

• 한국안전학회지
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• 제13권2호
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• pp.22-29
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• 1998

The natural convection cooling of simulated electronic chips located on a printed circuit board(PCB) has been studied by Computer Aided Engineering(CAE). In CAE, 3-dimensional finite element model of simulated electronic chip was made to accomplish heat transfer analysis at each design stage of a printed circuit boards for thermal optimization. The simulated electronic chips are installed protrudent from the plate about 3mm. The materials the plates are epoxy and aluminum. The results show that the chip with relatively high heat generation rates should not be close to each other. It is found, as well that cooling effect for the aluminum plate is superior to the epoxy plate and location of maximum temperature is significantly influenced by the structure variation of PCB. In developing PCB and electronic chips, it's recommended that CAE is very useful to estimate to the distribution of temperature.

• Transactions on Electrical and Electronic Materials
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• 제13권3호
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• pp.129-135
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• 2012

A number of surface mount technology (SMT) process variables including land design are considered for minimizing tombstone defect in flexible printed circuit assembly in high volume manufacturing. As SMT chip components have been reduced over the past years with their weights in milligrams, the torque that once helped self-centering of chips, gears to tombstone defects. In this paper, we have investigated the correlation of the assembly process variables with respect to the tombstone defect by employing statistically designed experiment. After the statistical analysis is performed, we have setup hypotheses for the root causes of tombstone defect and derived main effects and interactions of the process parameters affecting the hypothesis. Based on the designed experiments, statistical analysis was performed to investigate significant process variable for the purpose of process control in flexible printed circuit manufacturing area. Finally, we provide beneficial suggestions for find-pitch PCB design, screen printing process, chip-mounting process, and reflow process to minimize the tombstone defects.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2001년도 Proceedings ICPE 01 2001 International Conference on Power Electronics
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• pp.11-16
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• 2001

Recent publications showed that a pair of neighboring printed circuit board (PCB) windings can be used as a contactless energy transfer device. As a continued study on this area, the current paper presents the modeling, analysis, and application of the neighboring PCB windings with an emphasis on their circuit properties and device characteristics as a contactless energy transfer device. Theoretical results of the paper are confirmed with experiments on a prototype contactless energy transfer circuit that delivers 24W output power at $68\%$ efficiency through two 35mm-diameter PCB windings separated each other by 2.4mm.

• 한국CDE학회논문집
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• 제9권4호
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• pp.416-424
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• 2004

In this paper, the heat transfer analysis and thermal stress analysis of the PCB(Printed Circuit Board) equipped in electronic Packages are carried out for various may types of chips on the PCB. And two structural PCB models are used in the analyses. The electronic chips on the PCB usually emit heat and this heat generates the thermal stress around the chip. The thermal load due to the heat generation of chips on the PCB may cause the malfunction of the electronic packages such as a monitor. a computer etc. Hence, the PCB should be designed to withstand these thermal loads. In this paper, the heat transfer analysis and thermal stress analysis are executed for the PCB model with pins and the analysis results are compared with the results for the PCB model without pins. The analysis results show that the PCB model without pins is not good for the thermal stress analysis of PCB, even though these two models have similar heat transfer characteristics. The analysis results also show that the highest thermal stress occurs in the pin especially attached to the highest temperature chip, and the PCB constrained to the electronic package on the long side is structurally more stable than other cases. The analyses of the PCB are executed using the finite element analysis code, NISA.

• 전기전자학회논문지
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• 제22권3호
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• pp.882-885
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• 2018

시스템의 동작 속도가 빨라짐에 따라 인쇄 회로 기판(PCB: printed circuit board)에서 신호 무결성 문제가 매우 중요해지고 있다. 지금까지는 관습적으로 PCB 면적을 줄이고 가격을 낮추도록 설계하는데 치중해왔다. 그러나 초고속으로 동작하는 PCB에서는 유전체 특성, 배선 폭, 배선 간격, 임피던스 정합 등을 고려하여 정밀하고 세심하게 설계하지 않으면 제대로 동작하기 어렵다. 본 논문에서는 초고속 PCB에서 생기는 여러 가지 문제점과 이를 완화할 수 있는 다양한 설계 기법에 대해 살펴본다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2007년도 하계학술대회 논문집 Vol.8
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• pp.545-545
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• 2007

Recently, innovative process has been investigated in order to replace the conventional high-cost micro patterning processes on the electronic products. To produce desirable profit margins from this low cost products, printed circuit board(PCB), will require dramatic changes in the current manufacturing philosophies and processes. Innovative process using metal nano particles replaces the current industry standard of subtractive etched of copper as a highly efficient way to produce robust circuitry on low cost substrates. An advantage of using metal nano particles process in patterned conductive line manufacturing is that the process is additive. Material is only deposited in desired locations, thereby reducing the amount of chemical and material waste. Simply, it just draws on the substrate as glass epoxy or polyimide with metal nano particles. Particles, when their size becomes nano-meter scale, show some specific characteristics such as enhanced reactivity of surface atoms, decrease in melting point, high electric conductivity compared with the bulk. Melting temperature of metal gets low, the metal nano particles could be formated onto polymer substrates and sintered under $300^{\circ}C$, which would be applied in PCB. It can be getting the metal line of excellent electric conductivity.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2001년도 Proceedings ICPE 01 2001 International Conference on Power Electronics
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• pp.1-6
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• 2001

In this article, the fundamental concept, characteristics and application potentials of coreless printed-circuit-board (PCB) transformers are described. Coreless PCB transformers do not have the limitations associated with magnetic cores, such as the frequency limitation, magnetic saturation and core losses. In addition, they eliminate the manual winding process and its associated problems, including labor cost, reliability problems and difficulties in ensuring transformer quality in the manufacturing process. The parameters of the printed windings can be precisely controlled in modern PCB technology. Because of the drastic reduction in the vertical dimension, coreless PCB transformers can achieve high power density and are suitable for applications in which stringent height requirements for the circuits have to be met. A transformer's power density of $24W/cm^2$ has been reported in a power conversion application. When used in an isolation amplifier application, coreless PCB transformers tested so far enable the amplifier to achieve a remarkable linear frequency range of 1MHz, which is almost eight times higher than the frequency range of 120kHz in existing Integrated-Circuit products. PCB materials offer extremely high isolation voltage, typically from 15kV to 40kV, which is higher than many other isolation means such as optocouplers. It is envisaged that coreless PCB transformers can replace traditional core-based transformers in some industrial applications. Their application potentials deserve more attention and exploration.

• 자원리싸이클링
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• 제19권1호
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• pp.57-65
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• 2010

최근, 인쇄회로기판 제조공정으로부터 유가자원을 회수하고자 하는 연구가 활발히 진행되고 있다. 인쇄회로기판의 드릴가공 받침대로 사용한 후 폐기되는 백보드 소재활용과 소형화, 고 신뢰성화에 따른 유가금속인 금 회수가 필수적이다. 특히 이동통신용 전자부품의 핵심소재로 사용되는 인쇄회로기판부품에는 최소 0.03 ${\mu}m$에서부터 최대 50 ${\mu}m$ 두께로 금이 도금되어 있다. 금, 원자재, 약품 값 폭등으로 생산현장의 유가자원 활용이 중요한 과제로 대두되면서 유가자원 활용을 위한 경쟁이 가속화되는 추세다. 본고에서는 인쇄회로기판 제조공정에서 발생하는 폐백보드 및 금의 회수에 대한 기술동향을 제공함으로써 유가자원 활용 산업발전에 기여하고자 하였다.

• 한국전기전자재료학회논문지
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• 제34권2호
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• pp.90-98
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• 2021

Piezoelectric ceramic fiber composite (PCFC) was fabricated using a planar electrode printed piezoelectric ceramic fiber driven in transverse mode for small-scale wind energy harvester applications. The PCFC consisted of an epoxy matrix material and piezoelectric ceramic fibers sandwiched by interdigitated electrode (IDE) patterned polyimide films. The PCFC showed an excellent mechanical performance under a continuous stress. For the fabrication of PCB cantilever harvester, five -PCFCs were vertically attached onto a flexible printed circuit board (PCB) substrate, and then PCFCs were serially connected through a printed Cu circuit. The energy harvesting performance was evaluated applying an inverted structure, which imples its free leading edge located at an open end but the trailing edge at a clamped end, to enhance strain energy in a wind tunnel. The output voltage of the PCB cantilever harvester was increased as the wind speed increased. The maximum output power was 17.2 ㎼ at a resistance load of 200 ㏀ and wind speed of 9 m/s. It is considered that the PCB cantilever energy harvester reveals a potential use for wind energy harvester applications.