• ETRI Journal
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• 제44권5호
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• pp.849-858
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• 2022

Dynamic voltage frequency scaling (DVFS) has been widely adopted for runtime power management of various processing units. In the case of neural processing units (NPUs), power management of neural network applications is required to adjust the frequency and voltage every layer to consider the power behavior and performance of each layer. Unfortunately, DVFS is inappropriate for layer-wise run-time power management of NPUs due to the long latency of voltage scaling compared with each layer execution time. Because the frequency scaling is fast enough to keep up with each layer, we propose a layerwise dynamic frequency scaling (DFS) technique for an NPU. Our proposed DFS exploits the highest frequency under the power limit of an NPU for each layer. To determine the highest allowable frequency, we build a power model to predict the power consumption of an NPU based on a real measurement on the fabricated NPU. Our evaluation results show that our proposed DFS improves frame per second (FPS) by 33% and saves energy by 14% on average, compared with DVFS.

• Journal of Semiconductor Engineering
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• 제1권1호
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• pp.57-63
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• 2020

Complementary metal-oxide-semiconductor (CMOS) technology is now facing a power scaling limit to increase integration density. Since 1970s, multi-valued logic (MVL) has been considered as promising alternative to resolve power scaling challenge for increasing information density up to peta-scale level by reducing the system complexity. Over the past several decades, however, a power-scalable and mass-producible MVL technology has been absent so that MVL circuit and system implementation have been delayed. Recently, compact MVL device researches incorporating multiple-switching characteristics in a single device such as 2D heterojunction-based negative-differential resistance (NDR)/transconductance (NDT) devices and quantum-dot/superlattices-based constant intermediate current have been actively performed. Meanwhile, wafer-scale, energy-efficient and variation-tolerant ternary-CMOS (T-CMOS) technology has been demonstrated through commercial foundry. In this review paper, an overview for MVL development history including recent studies will be presented. Then, the status and its future research direction of MVL technology will be discussed focusing on the T-CMOS technology for peta-scale information processing in semiconductor chip.

• JSTS:Journal of Semiconductor Technology and Science
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• 제17권2호
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• pp.216-222
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• 2017

The most prominent challenge for MOSFET scaling is to reduce power consumption; however, the supply voltage ($V_{DD}$) cannot be scaled down because of the carrier injection mechanism. To overcome this limit, a new type of field-effect transistor using positive feedback as a carrier injection mechanism (FBFET) has been proposed. In this study we have investigated the electrical characteristics of a $Si_{1-x}Ge_x$ FBFET with one gate and one-sided $Si_3N_4$ spacer using TCAD simulations. To reduce the drain bias dependency, $Si_{1-x}Ge_x$ was introduced as a low-bandgap material, and the minimum subthreshold swing was obtained as 2.87 mV/dec. This result suggests that a $Si_{1-x}Ge_x$ FBFET is a promising candidate for future low-power devices.

• JSTS:Journal of Semiconductor Technology and Science
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• 제2권3호
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• pp.197-204
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• 2002

DRAM, SRAM, and FLASH memory are three major memory devices currently used in most electronic applications. But, they have very distinct attributes, therefore, each memory could be used only for limited applications. MRAM (Magneto-resistive Random Access Memory) is a promising candidate for a universal memory that meets all application needs with non-volatile, fast operational speed, and low power consumption. The simplest architecture of MRAM cell is a series of MTJ (Magnetic Tunnel Junction) as a data storage part and MOS transistor as a data selection part. To be a commercially competitive memory device, scalability is an important factor as well. This paper is testing the actual electrical parameters and the scaling factors to limit MRAM technology in the semiconductor based memory device by an actual integration of MRAM core cell. Electrical tuning of MOS/MTJ, and control of resistance are important factors for data sensing, and control of magnetic switching for data writing.

• KSII Transactions on Internet and Information Systems (TIIS)
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• 제11권10호
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• pp.5168-5181
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• 2017

The popularity of augmented reality (AR) applications and games are in high demand. Currently, the best common platform to implement AR services is on a smartphone, as online games, navigators, personal assistants, travel guides are among the most popular applications of smartphones. However, the power consumption of an AR application is extremely high, and therefore, highly adaptable and dynamic low power control schemes must be used. Dynamic voltage and frequency scaling (DVFS) schemes are widely used in smartphones to minimize the energy consumption by controlling the device's operational frequency and voltage. DVFS schemes can sometimes lead to longer response times, which can result in a significant problem for AR applications. In this paper, an AR response time monitor is used to observe the time interval between the AR image input and device's reaction time, in order to enable improved operational frequency and AR application process priority control. Based on the proposed response time monitor and the characteristics of the Linux kernel's completely fair scheduler (CFS) (which is the default scheduler of Android based smartphones), a response time step control (RSC) scheme is proposed which adaptively adjusts the CPU frequency and interactive application's priority. The experimental results show that RSC can reduce the energy consumption up to 10.41% compared to the ondemand governor while reliably satisfying the response time performance limit of interactive applications on a smartphone.

• 한국추진공학회지
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• 제2권1호
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• pp.13-20
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• 1998

다목적으로 활용할 수 있는 터보축엔진의 개발을 위한 정상상태 및 동적모사 프로그램을 개발하였다. 개발비, 개발시간, 개발위험도의 절감을 위해 가스발생기 부분은 성능이 잘 알려진 기존의 터어보제트 엔진을 활용하였으며 수명연장을 위해 터빈재질을 교체하고, Larson-Miller 곡선을 이용하여 약 3000hr 이상의 수명을 확보하기 위한 최대회전속도와 최대 터빈입구온도를 결정하였다. 추가되는 동력터어빈의 구성품 성능선도는 압축기 터어빈의 성능선도를 축척하여 사용하였다. 정상상태 성능해석에는 유량 및 일평형 방정식을 이용하였으며, 가스발생기와 동력터빈의 공회전 상태에서부터 최대 회전속도까지 동력터빈은 10% 간격, 가스발생기는 5%RPM 간격으로 해석하였다. 동적모사시에는 일정유량평형방법(Constant Flow Method : CMF)을 이용하였으며, 급 가속의 상황을 가정하고 연료유량이 Step 증가하도록 Scheduling 하였다. 이 때 터빈 입구온도에 오버슈트가 발생하여 제한온도를 초과하는 것을 확인할 수 있었다.

• 한국세라믹학회지
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• 제47권1호
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• pp.54-60
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• 2010

This paper shortly reviews our recent work on filled skutterudites, which are considered to be one of the most promising thermoelectric (TE) materials due to their excellent power factors and relatively low thermal conductivities. The filled skutterudite system also provides a platform for studying void filling physics/chemistry in compounds with intrinsic lattice voids. By using ab initio calculations and thermodynamic analysis, our group has made progresses in understanding the filling fraction limit (FFL) for single fillers in $CoSb_3$, and ultra-high FFLs in a few alkali-metal-filled $CoSb_3$ have been predicted and then been confirmed experimentally. FFLs in multiple-element-filled $CoSb_3$ are also investigated and anonymous filling behavior is found in a few specific systems. The calculated and measured FFLs, in both single and multiple-filled $CoSb_3$ systems, show good accordance so far. The thermal transport properties can be understood qualitatively by a phonon resonance scattering model, and it seems that a scaling rule may exist between the lattice thermal resistivity and the resonance frequency of filler atoms in filled system. Even though a few things become clear now, there are still many unsolved issues that call for further work.

• 한국통신학회논문지
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• 제39A권5호
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• pp.258-270
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• 2014

본 논문에서는 다중 사용자 간 시간 동기 오차에 강인한 상향링크 OFDMA (Orthogonal Frequency Division Multiple Access) 두 기법, 즉, ZCZ (Zero Correlation Zone) 코드 시간축 확산 OFDMA 기법과 시간동기오차에 강한 SC-FDMA (Single Carrier Frequency Division Mmultiple Access)기법의 채널용량을 비교한다. 보다 현실적인 성능을 비교하기 위해 사용자 간 시간 동기 오차 뿐 아니라 상향링크 OFDMA 신호 생성의 가장 큰 이슈인 PAPR (Peak-to-Average Power Ratio)에 의한 신호의 왜곡효과도 함께 고려한다. 사용자 간 시간 동기 오차에 의한 간섭이 존재하는 환경에서는 전력제어에 의해 증폭된 사용자들의 신호가 다른 사용자들의 신호에 큰 간섭으로 작용할 수 있다. 한편, 거리를 고려하여 증폭된 신호가 단말의 증폭기의 선형 증폭구간을 벗어나게 되면 신호의 왜곡이 발생하여 최종 성능의 저하를 발생시킬 수도 있다. 따라서, 기지국과 사용자 간의 거리만을 고려한 전력제어 방식이 아니라 최대 채널용량 성능을 갖게 하는 사용자 송신 전력 조합을 실험을 통해 찾는다. 즉, 사용자 단말의 전력 제한 수치와 사용자 시간 동기 오차의 최대범위 및 $E_b/N_0$ 등의 다양한 조합들에 대해 최대 채널용량 성능을 갖게 하는 송신전력 보정 계수(ASF: Adaptive Scaling Factor)을 실험을 통해 찾는다. 먼저, 송신전력 보정계수를 적용한 경우 두 상향링크 OFDMA 방식의 채널용량은 단순히 거리만을 고려한 전력제어 방식을 적용한 경우 즉, 송신전력 보정 계수=1인 경우에 비해 얼마나 높은 채널용량 성능을 가지는지 분석한다. 두 상향링크 OFDMA 방식의 채널용량 성능을 비교하면, 송신출력이 상대적으로 낮아도 되는 높은 $E_b/N_0$ 환경에서는 시간 동기 오차에 보다 강인한 특성을 가진 ZCZ 코드 시간축 확산 OFDMA 기법의 채널용량 성능이 좋고, 반대로 상대적으로 높은 송신출력을 요구하는 낮은 $E_b/N_0$ 환경에서는 낮은 PAPR 특성을 갖는 시간동기오차에 강한 SC-FDMA 기법의 채널용량 성능이 보다 우수함을 다양한 실험을 통해 보인다.