• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.9
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• pp.57-64
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• 2004

In this paper, we propose a RZ/HRZ mixture data transmission method for the asynchronous circuit design to reduce Power consumption. The dual-rail data with Rf decoding scheme is used to design asynchronous circuit, and it is easy to get a completion signal of the data validity from the native data as contrasted with sin91e-rail. However, the dual-rail scheme suffers from large chip area and increasing of Power consumption from all signals by the switching of the return-to-zero. We need to diminish number of circuit switching. The proposed RZ/HRZ data transmission reduces a switching activity to about 50% and it shows 23% lower power consumption than the conventional dual-rail coding with RZ's.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.65 no.9
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• pp.1597-1604
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• 2016

The speed at which the SRM (Switched Reluctance Motor) makes a transition from chopping control to single pulse operation. (i.e., low speed to high speed operation). It is unsatisfied with performance at all operational regimes. In this paper, the operational performance of SRM can be improved by using current hysteresis control method. This method maintains a generally flat current waveform. At the high speed, the current chopping capability is lost due to the development of the back-EMF. Therefore SRM operates in single pulse mode. By using zero-current switching and zero-voltage switching technique, the stress of power switches can be reduce in chopping mode. When the commutation from one phase winding to another phase winding, the current can be zero as fast as possible in this period because several times negative voltage of DC-source voltage produce in phase winding. This paper is compared to performance based on energy efficient C-dump converter topology and the proposed resonant C-dump converter topology. Simulation and experimental results are presented to verify the effectiveness of the proposed circuit.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.57 no.2
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• pp.72-78
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• 2008

The speed variation of SRM is fulfilled throughout a transition from chopping control to single pulse operation. (i,e., low speed to high speed operation). It is unsatisfied with performance at all operational regimes. In this paper, the operational performance of SRM can be improved by using current hysteresis control method. This method maintains a generally flat current waveform. At the high speed, the current chopping capability is lost due to the development of the back-EMF. Therefore SRM operates in single pulse mode. By using zero-current switching and zero-voltage switching technique, the stress of power switches can be reduce in chopping mode. When the commutation from one phase winding to another phase winding, the current can be zero as fast as possible in this period because several times negative voltage of DC-source voltage produce in phase winding. This paper is compared to performance based on conventional C-dump converter topology and the proposed resonant C-dump converter topology. Simulation and experimental results are presented to verify the effectiveness of the proposed circuit.

• Journal of ILASS-Korea
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• v.10 no.2
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• pp.18-31
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• 2005

This study was performed to explore the liquid breakup and atomization characteristics for the classification of drop formation mode and background of uniform droplets generation in electrohydrodynmaic atomization according to the change of experimental parameters such as nozzle material (stainless steel. teflon). fluid flow rate, applied electrical field and intensity, and frequency. In results, from the classification map of drop formation modes according to the variation of applied AC voltage and frequency at a stainless nozzle, the droplet size was smaller than the outer diameter of the nozzle tip relatively in the spindle mode. The transition points became clearly to be moved toward the high applied voltage by rising the applied AC frequency beyond 450Hz. Also the droplet radius can be observed quite small in the frequency bandwidth of $350{\sim}450Hz$. The droplet radiuses decrease as the applied voltage increases for a fixed applied AC frequency within the range from 50Hz to 400Hz Over 400Hz, the relation between the power intensity and the droplet size was not consistent with a continuous mechanism of liquid breakup. Thus, it is showed that the droplet size distribution using the teflon nozzle was analogous to the results of stainless steel, but the droplet size was bigger than that of stainless steel relatively in case of a teflon nozzle.

• Journal of Electrical Engineering and Technology
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• v.13 no.1
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• pp.226-239
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• 2018

In this paper, design and control method ZVT Interleaved Bidirectional LDC(IB-LDC) for mild-hybrid electric vehicle is proposed. The IB-LDC is composed of interleaved buck and boost converters employing an auxiliary inductor and auxiliary capacitors to achieve zero-voltage-transition. Operating principle of IB-LDC according to operation mode is introduced and mathematically analyzed in buck and boost mode. Moreover, PFM and phase control are proposed to reduce circulating current for low power range. Passive components design such as main inductor, auxiliary inductor and capacitors is suggested, considering ZVT condition and maximizing efficiency. Furthermore, a 600W prototype of ZVT IB-LDC for MHEVs is built and tested to verify validity.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.6 s.348
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• pp.47-52
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• 2006

This paper proposes a novel low-power $32bit\times32bit$ multiplier for deep submicron technologies beyond 130nm. As technology becomes small, static power due to leakage current significantly increases, and it becomes comparable to dynamic power. Recently, shutdown method based on MTCMOS is widely used to reduce both dynamic and static power. However, it suffers from severe power line noise when restoring whole large-size functional block. Therefore, the proposed multiplier mitigates this noise by shutting down and waking up sequentially along with pipeline stage. Fabricated chip measurement results in $0.35{\mu}m$ technology and gate-transition-level simulation results in 130nm and 90nm technologies show that it consumes $66{\mu}W,\;13{\mu}W,\;and\;6{\mu}W$ in idle mode, respectively, and it reduces power consumption to $0.04%\sim0.08%$ of active mode. As technology becomes small, power reduction efficiency degrades in the conventional clock gating scheme, but the proposed multiplier does not.

• Proceedings of the KIPE Conference
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• 2017.07a
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• pp.367-368
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• 2017

본 논문에서는 영전류 모드로 진입한 zero voltage transition(ZVT) interleaved bi-direction low voltage DC-DC converter(IB-LDC)의 도통 손실을 최소화하기 위한 위상 제어가 제안된다. IB-LDC의 출력단 배터리가 완충되어 영전류 모드로 진입하면 IB-LDC의 입 출력 평균 전류는 0[A]로 감소하지만 보조 회로 전류는 기존의 설계 값에 의해 감소하지 않아 지속적인 도통 손실을 일으킨다. 따라서 본 논문에서는 영전류 모드로 진입한 IB-LDC의 보조 회로에 ZVT 조건을 만족시키는 공진 전류만 흐르도록 하여 도통 손실을 최소화하는 위상 제어를 제안하였다. 또한 PSIM simulation 및 실험을 통해 증명하였다.

• Proceedings of the KIPE Conference
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• 2012.07a
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• pp.419-420
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• 2012

동기 정류 컨버터는 다이오드에서 발생하는 도통손실을 줄이기 위해 정류 다이오드 대신 모스펫으로 대체한 것으로 고전류 응용에서 효율을 높이기 위해 주로 사용된다. 하지만 낮은 부하에서 동기 모드 보다는 DCM 으로 동작하는 것이 효율 향상에 유리하다. 일반적으로 이와 같은 모드 변환 시점을 알기 위해서는 전류의 센싱이 요구된다. 본 논문에서는 전류의 센싱없이 P&O 방식을 통해 모드 변환 시점을 확인하는 방법을 제안한다. 제안한 방법은 자세한 분석과 함께 TI사의 TMS320F28335를 통해 구현하였으며 실험을 통해 타당성 및 효용성을 검증하였다.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.59 no.4
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• pp.351-357
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• 2010

In this paper, a vector control of the IPMSM drives for the next generation domestic high speed railway system is presented. The applied control method uses one pulse mode field weakening control in constant power region, and maximum torque control per ampere control in constant torque region considering current and voltage limits. An overmodulation control interval is inserted to improve the transient characteristics during transition period of the control modes. Simulation programs based on Matlab/Simulink are developed. Finally the designed system is verified by simulation and their characteristics are analyzed by the simulation results.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.7
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• pp.10-16
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• 1999

This paper describes a low voltage swing bus driver using FCSR(Feedback Control Swing voltage Reduction) which can control bus swing voltage within a few hundred of mV. It is proposed to reduce power consumption in On-chip interface, especially for MDL(Merged DRAM Logic) architecture wihich has wide and large capacitance bus. FCSR operates on differential signal dual-line bus and on precharged bus with block controlling fuction. We modeled driver and bus to scale driver size automatically when bus environment is variant. We also modeled coupling capacitance noise(crosstalk) of neighborhood lines which operate on odd mode with parallel current source to analysis crosstalk effect in the victim-line according as voltage transition in the aggressor-line and environment in the victim-line. We built a test chip which was designed to swing 600mV in bus, shows 70Mhz operation at 3.3V, using Hyundai 0.8um CMOS technology. FCSR operate with 250Mhz at 3.3V by Hspice simulation.