• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.6
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• pp.393-399
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• 2003

The current paper presents a new Mo-MPS rectifier using molybdenum as barrier metal to improve on the low forward voltage drop and power dissipation of the coventional Al-MPS and Pt-MPS rectifier. Electrical characteristics of the fabricated Mo-MPS rectifier are imvestigated compared with Al-MPS and Pt-MPS rectifier. At the same current level, the forward voltage drop of the Mo-MPS was reduced by 0.11V~0.24V compared to that of the conventional MPS rectifier. Accordingly, since the Power dissipation of a rectifier mostly depends on the forward current density and forward voltage drop, the Mo-MPS rectifier achieved improved power dissipation when compared to the conventional MPS rectifier. The reverse breakdown voltage of a Mo-MPS rectifier with 68% Schottky junction area was about 304y. Despite having a lower forward voltage drop than a conventional MPS rectifier, the Mo-MPS rectifier still exhibited a higher reverse breakdown voltage.

• Journal of the Korea Society of Computer and Information
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• v.15 no.5
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• pp.103-111
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• 2010

This paper proposes an efficient data transmission strategy using adaptive-tier low transmission power schedule in a TDMA-based ad hoc MAC protocol. Since the network resource of ad hoc networks has the characteristic of reassignment due to the multiple interferences and the contention-based limited wireless channel, the efficient time slot assignment and low power transmission scheme are the main research topics in developing ad hoc algorithms. Based on the proposed scheme of interference avoidance when neighbor clusters transmit packets, this paper can minimize the total energy dissipation and maximize the utilization of time slot in each ad hoc node. Simulation demonstrates that the proposed algorithm yields 15.8 % lower energy dissipation and 4.66% higher time slot utilization compared to the ones of two-tier conventional energy dissipation model.

• Journal of applied mathematics & informatics
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• v.15 no.1_2
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• pp.363-375
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• 2004

In this paper, We show that the bandpass random signals of the form ∑$_{\alpha}$$\alpha$$_{\alpha}$ a Sin(2$\pi$f$_{\alpha}$t + b$_{\alpha}$) where a$_{\alpha}$ being a random number in [0,1], f$_{\alpha}$ a random integer in a given frequency band, and b$_{\alpha}$ a random number in [0, 2$\pi$], generate Gaussian white noise signals and hence they are adequate for simulating Continuous Markov processes. We apply the result to the fluctuation-dissipation formula for the Johnson noise and show that the probability distribution for the long term average of the power of the Johnson noise is a X$^2$ distribution and that the relative error of the long term average is (equation omitted) where N is the number of blocks used in the average.error of the long term average is (equation omitted) where N is the number of blocks used in the average.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.25 no.6
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• pp.474-480
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• 2012

Diagnostic tests were performed on two high voltage(HV) motor stator windings. These tests included the measurement of insulation resistance, polarization index, AC current, dissipation factor($tan{\delta}$) and partial discharge(PD) magnitude. Surface contamination of HV motor stator windings has an effect on the AC current and $tan{\delta}$. When the stator windings were finished cleaning and insulation reinforcement, the increase rate of AC current(${\Delta}I$) and dissipation factor(${\Delta}tan{\delta}$) were very small compared to those before cleaning. However, the PD magnitude remained the same. These tests show that cleaning and insulation reinforcement of HV motor stator windings can reduce the insulation failure.

• 한국전산유체공학회:학술대회논문집
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• 2005.04a
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• pp.91-95
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• 2005

A heat dissipation modeling method of EEE parts is developed for thermal design and analysis of an satellite electronic equipment. The power consumption measurement value of each functional breadboard is used for the heat dissipation modeling method. For the purpose of conduction heat transfer modeling of EEE parts, surface heat model using very thin ignorable thermal plates is developed instead of conventional lumped capacity nodes. The thermal plates are projected to the printed circuit board and can be modeled and modified easily by numerically preprocessing programs according to design changes. These modeling methods are applied to the thermal design and analysis of CTU and verified by thermal cycling and vacuum tests.

• The Magazine of the Society of Air-Conditioning and Refrigerating Engineers of Korea
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• v.17 no.4
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• pp.489-498
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• 1988

An analysis has been given for the effect of viscous dissipation on the thermal instability of plane Couette flow between two parallel plates maintained at different constant temperatures. Under the assumption that the principle of the exchange of stabilities holds, stationary disturbance quantities in the form of longitudinal vortices are considered. The magnitudes of disturbance quantities are then represented as fast convergent power series so that the eigenvalue problem for determining the onset conditions of the thermal instability may be reduced to a simplified problem of finding the roots of a $4{\times}4$ determinant. It is shown that as the magnitude of the visucous dissipation increases the flow becomes more susceptible to instabilities, which is in very good agreement with previous results obtained in some related researches.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.15 no.6
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• pp.1343-1348
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• 2011

A modified capacitive detection circuit of charge sharing scheme is proposed, which reduces the static power dissipation and increases the voltage difference between a ridge and valley more than a conventional circuit. The detection circuit is designed and simulated in 3.3V, $0.35{\mu}m$ standard CMOS process, 40MHz condition. The result shows about 47% power dissipation reduction and 90% improvement of difference between a ridge and valley sensing voltage. The proposed circuit is layout without area increasing of a one pixel.

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.5
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• pp.595-604
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• 2016

Utilizing a standard 130-nm CMOS process, a RF frontend is designed at 24 GHz for automotive collision avoidance radar application. Single IF direct conversion receiver (DCR) architecture is adopted to achieve high integration level and to alleviate the DCR problem. The proposed frontend is composed of a two-stage LNA and downconversion mixers. To save power consumption, and to enhance gain and linearity, stacked NMOS-PMOS $g_m$-boosting technique is employed in the design of LNA as the first stage. The switch transistors in the mixing stage are biased in subthreshold region to achieve low power consumption. The single balanced mixer is designed in PMOS transistors and is also realized based on the well-known folded architecture to increase voltage headroom. This frontend circuit features enhancement in gain, linearity, and power dissipation. The proposed circuit showed a maximum conversion gain of 19.6 dB and noise figure of 3 dB at the operation frequency. It also showed input and output return losses of less than -10 dB within bandwidth. Furthermore, the port-to-port isolation illustrated excellent characteristic between two ports. This frontend showed the third-order input intercept point (IIP3) of 3 dBm for the whole circuit with power dissipation of 6.5 mW from a 1.5 V supply.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.12
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• pp.83-90
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• 2004

This paper proposes an efficient scan testing method for compression of test input data and reduction of test power for SOC. The proposed method determines whether some parts of a test response can be reused as a part of next input test data on the analysis of deterministic test data and its response. Our experimental results show that benchmark circuits have a high similarity between un-compacted deterministic input test data and its response. The proposed testing method achieves the average of 29.4% reduction of power dissipation based on the number of test clock and 69.7% reduction of test data for ISCAS'89 benchmark circuits.

• Journal of Advanced Marine Engineering and Technology
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• v.40 no.2
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• pp.96-101
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• 2016

The thermal management of high-power LED components in an assembly structure is crucial for the stable operation and proper luminous function. This study employs numerical tools to determine the optimum thermal design in LEDs with a heat sink consisting of a crevice-type vapor-chamber heat pipe. The effects of the MCPCB are investigated in terms of the substrate thicknesses on which the LEDs are mounted. Further, different placement configurations in a system module are considered. This study found that for a confined area, a power of 40 W/LED is applicable to a high-power package. Furthermore, the thermal conductivity of dielectric layer materials should ideally be greater than 0.9 W/m.K. The temperature conditions of the vapor chamber in a heat pipe greatly affect the thermal performance of the system. At an offset distance of 9.0 mm and a $2^{\circ}C$ increase in the temperature of the heat pipe, the resulting maximum temperature increase is approximately $1.9^{\circ}C$ for each heat dissipation temperature. Finally, at a thermal conductivity of 0.3 W/m.K, it was found that the total thermal resistance changes dramatically. Above 1.2 W/m.K, the resistance change reduces exponentially.