• Title/Summary/Keyword: power amplifier

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Research on PAE of Doherty Amplifier with Low-pass Filter of Wide Stopband (광대역 특성의 LPF를 이용한 도허티 증폭기의 전력 효율 향상에 관한 연구)

  • Jung, Du-Won;Seo, Chul-Hun
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.46 no.1
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    • pp.107-111
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    • 2009
  • In this paper, the power added efficiency(PAE) of a Doherty amplifier has been improved by applying Photonic Bandgap(PBG) characteristics on the output of amplifier. As a result of the high order harmonics termination, excellent improvement in PAE, maximum output power as well as linearity is obtained. The PAE is improved as much as relatively 35% compared with a conventional Doherty amplifier. Moreover, size of LPF is reduced by PBG characteristics. Therefore the whole amplifier circuit size is considerably reduced by diminishing in size of the LPF as compared with a Doherty amplifier using conventional LPFs.

Research on PAE of CMOS Class-E Power Amplifier For Multiple Antenna System (다중 안테나 시스템을 위한 CMOS Class-E 전력증폭기의 효율 개선에 관한 연구)

  • Kim, Hyoung-Jun;Joo, Jin-Hee;Seo, Chul-Hun
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.45 no.12
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    • pp.1-6
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    • 2008
  • In this paper, bias control circuit structure have been employed to improve the power added efficiency of the CMOS class-E power amplifier on low input power level. The gate and drain bias voltage has been controlled with the envelope of the input RF signal. The proposed CMOS class-E power amplifier using bias controlled circuit has been improved the PAE on low output power level. The operating frequency is 2.14GHz and the output power is 22dBm to 25dBm. In addition to, it has been evident that the designed the structure has showed more than a 80% increase in PAE for flatness over all input power level, respectively.

Analysis of the Gate Bias Effects of the Cascode Structure for Class-E CMOS Power Amplifier (CMOS Class-E 전력증폭기의 Cascode 구조에 대한 게이트바이어스 효과 분석)

  • Seo, Donghwan
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.28 no.6
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    • pp.435-443
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    • 2017
  • In this study, we analyzed the effects of the common-gate transistor bias of a switching mode CMOS power amplifier. Although the most earier works occured on the transistor sizes of the cascode structure, we showed that the gate bias of the common-gate transistor also influences the overall efficiency of the power amplifier. To investigate the effect of the gate bias, we analyzed the DC power consumption according to the gate bias and hence the efficiency of the power amplifier. From the analyzed results, the optimized gate bias for the maximum efficiency is lower than the supply voltage of the power amplifier. We also found that an excessively low gate bias may degrade the output power and efficiency owing to the effects of the on-resistance of the cascode structure. To verify the analyzed results, we designed a 1.9 GHz switching mode power amplifier using $0.18{\mu}m$ RF CMOS technology. As predicted in the analysis, the maximum efficiency is obtained at 2.5 V, while the supply voltage of power amplifier is 3.3 V. The measured maximum efficiency is 31.5 % with an output power of 29.1 dBm. From the measureed results, we successfully verified the analysis.

Development of Compact High Voltage Driving Amplifier for Piezo Ceramic Actuator (압전 세라믹 액추에이터를 위한 소형 고전압 구동 증폭기 개발)

  • Kim, Soon-Cheol;Han, Jung-Ho;Yi, Soo-Yeong
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.13 no.11
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    • pp.5409-5415
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    • 2012
  • Piezo ceramic actuator is used for various industrial products such as spray, dispenser, and valve control etc. Since the deflection of the piezo ceramic element depends on the applied voltage, it is required a power amplifier with high voltage supply for driving the piezo ceramic actuators. In this paper, we develop a simple H-bridge type power amplifier and a compact flyback type high voltage switching mode power supply for piezo ceramic actuators. It is easy to adjust the amount of energy input to piezo ceramic actuator by pulse-width-modulation with H-bridge type power amplifier.

W-CDMA 30 Watts High Power Amplifier Using Anti-Phase Intermodulation Distortion Linearization Technology (Anti-Phase IMD 선형화 기술을 이용한 W-CDMA 30 W 대전력 증폭기)

  • Kang, Won-Tae;Do, Ji-Hoon;Chang, Jeong-Seok;Hong, Ui-Seok
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.18 no.7
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    • pp.723-730
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    • 2007
  • This paper shows how the ACLR of power amplifier can be reduced by using Anti-phase IMD linearization technique which generate anti-phase IMD in the driver stage compare to output stage's IMD. And design process proposed. From the experimental result of W-CDMA 4FA input signal, this amplifier has ACLR -55 dBc@5 MHz offset at 30 watts average power. Compare to optimum matching technique to get maximum power gain, this technique has been improved ACLR by 12 dBc. Also this amplifier meets 50 watts average output power amplifier specification in domestic market.

Design and Fabrication of a HBT Power Amplifier for Quasi Millimeter-wave Broadband Wireless Local Loop Applications (준밀리미터파 BWLL용 HBT 전력증폭기 설계 및 제작)

  • 김창우;채규성
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.27 no.3C
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    • pp.234-240
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    • 2002
  • A power amplifier with AlGaAs/InGaAs/GaAs HBT's has been developed for customer premise equipments of the quasi millimeter-wave frequency-band broadband wireless local loop(BWLL) system. Parameters of the linear and nonlinear equivalent circuits for a common base HBT have been extracted by a fitting method. The amplifier has been designed through the linear and nonlinear circuit simulations and fabricated on a ceramic substrate for a hybrid IC. The amplifier has produced a 25.5-dBm output power with 35% power-added efficiency(PAE) at 24.4 GHz and achieved a 7.5-dB linear power gain at 24.8 GHz. In 24.25 ∼24.75 GHz band, the amplifier has exhibited a saturated output over larger than 22 dBm and PAE higher than 25%.

Bit Error Rate Dependence on Amplifier Spacing in Long-Haul Optical Transmission System with Mid-Span Spectral Inversion (Mid-Span Spectral Inversion 기법을 채택한 장거리 광 전송 시스템에서의 증폭기 간격에 따른 비트 에러율)

  • Lee, Seong-Real
    • Journal of Advanced Navigation Technology
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    • v.9 no.2
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    • pp.109-120
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    • 2005
  • In this paper, bit error rate (BER) characteristics, sensitivity and minimum allowable launching power are numerically investigated as a function of amplifier spacing that consisted of 1,200 km WDM systems with MSSI method. It is conformed that the sensitivity and minimum allowable launching power are gradually degraded as amplifier spacings are gradually expanded, but those are not largely affected by modulation format. The sensitivity of RZ transmission system is smaller than that of NRZ transmission system, but minimum allowable launching power of NRZ transmission system is smaller than that of RZ transmission system. And, it is confirmed that the best amplifier spacing in NRZ and RZ transmission system is less than 50 km, because the sensitivity and minimum allowable launching power are less affected by fiber dispersion, channel wavelength and pump light power.

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Design of Predistortion Linearizer using Common-Gate MESFET (공통 게이트 MESFET를 이용한 전치왜곡 선형화기 설계)

  • 주성남;박청룡;최조천;최충현;김갑기
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2003.10a
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    • pp.53-56
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    • 2003
  • A linear power amplifier is particularly emphasized on the CDMA system using a linear modulation scheme, because IMD which cause adjacent channel interference and co channel Interference is mostly generated in a nonlinear power amplifier. In this paper, a new type of linearization technique proposed. It is presented that balanced MESFET predistortion linearizer added. Experimental result are present for Korea PCS frequency band. The implemented linearizer is applied to a 30dBm class. A power amplifier for simulation performance. Two-tone signals at 1850 MHz and 1851.23 MHz are injected into the main power amplifier. The main power amplifier with a 12.1dB gain and a P1dB of 30 dBm(two-tone) was utlized. The reduction of IMD is around 22dB.

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A Highly Efficiency, Highly linearity Class-F Power Amplifier Using CMRC Structure (CMRC(Compact Microwave Resonance Circuit) 구조를 적용한 고효율, 고선형성 Class-F 전력증폭기)

  • Lee, Chong-Min;Seo, Chul-Hun
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.44 no.7 s.361
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    • pp.12-16
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    • 2007
  • In this paper, The 3rd-IMD of class-F power amplifier is improved using CMRC structure in order to remove the parasitic End harmonic at the output load of class-F power amplifier. The total size is very small more than class-F power amplifier using PBG. (Photonicband Gap) structure during improved 3rd-IMD characteristic performance.

A Feedforward Linear Power Amplifier using Error Feedback Technique (에러 피드백 기술을 이용한 피드 포워드 선형 전력 증폭기)

  • 김완종;조경준;김종헌;김남영;이종철;이병제
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.11 no.8
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    • pp.1407-1413
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    • 2000
  • This paper presents a feedforward linear power amplifier (LPA) using error feedback technique to achieve low intermodulation distortions(IMD) of power amplifiers for base stations. Especially, the proposed linear power amplifier is applied to feedforward technique combined with error feedback technique, which has no loss of amplifier gain unlike typical feedback technique. The proposed LPA is designed by using HP ADS ver. 1.3, fabricated. When two-tone signals at 1850 MHz and 1851.25 MHz with -7 dBm/tone from synthesizers are injected into the main power amplifier with gain of 28 dB and P1dB of 1W, the proposed LPA could reduce more than 35 dB.

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