• Journal of the Korean Institute of Telematics and Electronics A
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• v.30A no.1
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• pp.44-50
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• 1993

In an attempt to improve the electrical characteristics of tantalum pentoxide dielectric film, silicon substrate was reacted with a nitrogen plasma to form a silicon nitride of 50.angs. and then tantalum pentoxide thin films were formed by reactive sputtering in the same chamber. Breakdown field and leakage current density were measured to be 2.9 MV/cm and 9${\times}10^{8}\;A/cm^{2}$ respectively in these films whose thickness was about 180.angs.. With annealing at rectangular waveguides with a slant grid are investigated here. In particular, 900.deg. C in oxygen ambient for 100 minutes, breakdown field and leakage current density were improved to be 4.8 MV/cm and 1.61.6${\times}10^{8}\;A/cm^{2}$ respectively. It turned out that the electrical characteristics could also be improved by oxygen plasma post-treatment and the conduction mechanism at high electric field proved to be Schottky emission in these double-layered films.

• Journal of the Semiconductor & Display Technology
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• v.2 no.4
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• pp.31-35
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• 2003

We present a formation technique of thin film heater for heat transfer components. Thin film structures of Cr-Si have been prepared on top of alumina substrates by magnetron sputtering. More samples of Mo thin films were prepared on silicon oxide and silicon nitride substrates by electron beam evaporation technology. The electrical properties of the thin film structures were measured up to the temperature of $500^{\circ}C$. The thickness of the thin films was ranged to about 1 um, and a post annealing up to $900^{\circ}C$ was carried out to achieve more reliable film structures. In measurements of temperature coefficient of resistance (TCR), chrome-rich films show the metallic properties; whereas silicon-rich films do the semiconductor properties. Optimal composition between Cr and Si was obtained as 1 : 2, and there is 20% change or less of surface resistance from room temperature to $500^{\circ}C$. Scanning electron microscopy (SEM) and Auger electron spectroscopy (AES) were used for the material analysis of the thin films.

• Journal of the Semiconductor & Display Technology
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• v.13 no.3
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• pp.61-67
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• 2014

Micro-cracks in crystalline silicon wafer often result in wafer breakage in solar wafer manufacturing, and also their existence may lead to electrical failure in post fabrication inspection. Therefore, the reliable detection of micro-cracks is of importance in the photovoltaic industry. In this paper, an experimental method to select optimal parameters in anisotropic diffusion filter is proposed. It can reliably detect micro-cracks by the distinct extension of boundary as well as noise reduction in near-infrared image patterns of micro-cracks. Its performance is verified by experiments of several type cracks machined.

• Electrical & Electronic Materials
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• v.7 no.4
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• pp.294-299
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• 1994

CHF$_{3}$/CH$_{4}$Ar 플라즈마에 의해 형성된 산화막 식각 잔류물의 화학구조와 이 잔류물의 제거를 위한 세정방법을 x-ray photoelectron spectroscopy를 이용하여 조사하였다. 잔류무르이 구조는 CF$_{x}$-polymer와 Si-C, Si-O 결합으로 이루어진 SiO$_{y}$ C$_{z}$ 이었다. CF$_{4}$O$_{2}$ 플라즈마에 의한 silicon light etch는 산화막 식각 잔류물인 SiO$_{y}$ C$_{z}$ 층과 손상된 실리콘 표면을 제거하엿으며 NH$_{4}$OH-H$_{2}$O$_{2}$과 HF용액으로 완전히 제거되는 CF$_{x}$-polymer/SiO$_{x}$층을 남겼다. 100.angs.정도의 silicon light etch는 minority carrier life time과 thermal wave signal값을 초기 웨이퍼 수준까지 회복시켰으며 접합누설 전류도 거의 습식 식각 공정수준까지 감소시켰다.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2000.04a
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• pp.125-128
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• 2000

ZnO thin films on silicon substrates have been deposited by pulsed laser deposition technique(PLD). A Nd:YAG laser was used with the wavelength of 355 nm. In order to investigate the effect of oxygen post-annealing treatment on the property of ZnO thin films, deposited film has been annealed at the substrate temperature of $440^{\circ}C$. After post-annealing treatment in the oxygen ambient, the stoichiometry of ZnO film has been characterized be improved which results in higher UV emission intensity of photoluminescence.

• Proceedings of the KIEE Conference
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• 1999.11d
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• pp.944-946
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• 1999

The thermal stability of the post cured epoxy-polysiloxane IPN structure was observed by using DSC and TGA. As the post curing time increased the glass transition temperature increased and the secondary exothermic peak disappeared. The thermally decomposing activation energy calculated by using Kissinger expression was 225.6 kJ/mol. The thermal stability of the grafted IPN of epoxy and silicon compound depends on the composing ratio and post curing conditions of time and temperature.

• Transactions of the Korean Society of Automotive Engineers
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• v.8 no.3
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• pp.190-197
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• 2000

A graphic vehicle modeling pre-processing program and a visualization post-processing program have been developed for AutoDyn7, which is a special program for vehicle dynamics. The Rapid-App for GUI(Graphic User Interface) builder and the Open Inventor for 3D graphic library have been employed to develop these programs in Silicon Graphics workstation. A Graphic User Interface program integrates vehicle modeling pre-processor, AutoDyn7 analysis processor, and visualization post-processor. In vehicle modeling pre-processor, vehicle hard point data for a suspension model are automatically converted into multibody vehicle system data. An interactive graphics capabilities provides suspension modeling aides to verify user input data interactively. In visualization post-processor, vehicle virtual test simulation results are animated with virtual testing environments.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.1
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• pp.131-136
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• 2013

TSV based 3D ICs have been widely developed with new problems at die and IC levels. It is imperative to test at post-bond as well as pre-bond to achieve high reliability and yield. This paper introduces a new testable design technique which not only test microscopic defects at TSV input/output contact at a die but also test interconnect defects at a stacked IC. IEEE 1500 wrapper cells are augmented and through at-speed tests for pre-bond die and post-bond IC, known-good-die and defect free 3D IC can be massively manufactured+.

• 한국신재생에너지학회:학술대회논문집
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• 2009.06a
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• pp.172-175
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• 2009

n-type crystalline silicon wafers were passivated with intrinsic a-Si:H thin films on both sides using HWCVD. Minority carrier lifetime measurement was used to verify interface passivation properties between a-Si:H thin film and crystalline Si wafer. Thin film interface characteristics were investigated depending on $H_2/SiH_4$ ratio and hot wire deposition temperature. Vacuum annealing were processed after deposition a-Si:H thin films on both sides to investigate thermal effects from post process steps. We noticed the effect of interface passivation properties according to $H_2/SiH_4$ ratio and hot wire deposition temperature, and we had maximum point of minority carrier lifetime at H2/SiH4 10 ratio and $1600^{\circ}C$ wire temperature.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.122-122
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• 2008

Recently, Metal/Alumina/Silicon-Nitride/Silicon-Oxide/Silicon (MANOS) structures are one of the most attractive candidates to realize vertical scaling of high-density NAND flash memory [1]. However, as ANO layers are miniaturized, negative and positive bias temperature instability (NBTI/PBTI), such as the flat band voltage shift, ${\Delta}V_{FB}$, the interfacial trap density increase, ${\Delta}D_{it}$, the gate leakage current, ${\Delta}I_G$. and the retention characteristics, in MONOS capacitors, becomes an important issue in terms of reliability. It is well known that tunnel oxide degradation is a result of the oxide and interfacial traps generation during FN (Fowler-Nordheim) stress [2]. Because the bias temperature stress causes an increase of both interfacial-traps and fixed oxide charge could be a factor, witch can degrade device reliability during the program and erase operation. However, few studies on NBTI/PBTI have been conducted on improving the reliability of MONOS devices. In this work, we investigate the effect of post-annealing gas on bias temperature instability (BTI), such as the flat band voltage shift, ${\Delta}V_{FB}$, the interfacial trap density shift, ${\Delta}I_G$ retention characteristics, and the gate leakage current characteristics of MANOS capacitors. MANOS samples annealed at $950^{\circ}C$ for 30 s by a rapid thermal process were treated via additional annealing in a furnace, using annealing gases $N_2$ and $N_2-H_2$ (2 % hydrogen and 98 % nitrogen mixture gases) at $450^{\circ}C$ for 30 min. MANOS samples annealed in $N_2-H_2$ ambient had the lowest flat band voltage shift, ${\Delta}V_{FB}$ = 1.09/0.63 V at the program/erase state, and the good retention characteristics, 123/84 mV/decade at the program/erase state more than the sample annealed at $N_2$ ambient.