• Transactions on Electrical and Electronic Materials
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• 제6권2호
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• pp.57-62
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• 2005

Using intense pulsed ion beam evaporation technique, we have succeeded in the preparation of poly crystalline silicon thin films without impurities on silicon substrate. Good crystallinity and high deposition rate have been achieved without heating the substrate by using lEE. The crystallinity of poly-Si film has been improved with the high density of the ablation plasma. The intense diffraction peaks of poly-Si thin films could be obtained by using the substrate bias system. The crystallinity and the deposition rate of poly-Si thin films were increased by applying (-) bias voltage for the substrate.

• 태양에너지
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• 제19권3호
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• pp.125-131
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• 1999

This paper deals with a novel structure of poly-Si solar cell. A grain boundary(GB) of poly-Si acts as potential barrier and recombination center for photo-generated carriers. To reduce unwanted side effects at the GB of poly-Si, we employed physical GB removal of poly-Si using chemical solutions. Various chemical etchants such as Sirtl, Yang, Secco, and Schimmel were investigated for the preferential GB etching. Etch depth about 10 ${\mu}m$ was achieved by a Schimmel etchant. After a chemical etching of poly-Si, we used $POCl_3$ for emitter junction formation. This paper used an easy method of top electrode formation using a RF sputter grown ITO film. ITO films with thickness of 300 nm showed resistivity of $1.26{\times}10^{-4}{\Omega}-cm$ and overall transmittance above 80%. Using a preferential GB etching and ITO top electrode, we developed a new fabrication procedure of poly-Si solar cells. Employing optimized process conditions, we were able to achieve conversion efficiency as high as 16.6% at an input power of 20 $mW/cm^2$. This paper investigates the effects of process parameters: etching conditions, ITO deposition factors, and emitter doping densities in a poly-Si cell fabrication procedure.

• 한국전기전자재료학회논문지
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• 제24권9호
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• pp.766-772
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• 2011

Amorphous Si (a-Si) thin films of $p^+/p^-/n^+$ were deposited on $Si_3N_4$/glass substrate by using a plasma enhanced chemical vapor deposition (PECVD) method. These films were annealed at various temperatures and for various times by using a rapid thermal process (RTP) equipment. This step was added before the main thermal treatment to make the nuclei in the a-Si thin film for reducing the process time of the crystallization. The main heat treatment for the crystallization was performed at the same condition of $600^{\circ}C$/18 h in conventional furnace. The open-circuit voltages ($V_{oc}$) were remained about 450 mV up to the nucleation condition of 16min in the nucleation RTP temperature of $680^{\circ}C$. It meat that the process time for the crystallization step could be reduced by adding the nucleation step without decreasing the electrical property of the thin film Si for the solar cell application.

• 대한기계학회:학술대회논문집
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• 대한기계학회 2004년도 춘계학술대회
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• pp.1370-1375
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• 2004

This article investigates the heat transfer characteristics in a RTA system for LCD manufacturing and suggests a way to evaluate the quality of a poly-Si film from the thin film optics analysis. The transient and one-dimensional conductive/radiative heat transfer equation considering wave interference effect is solved to predict surface temperatures of thin films. In dealing with radiative heat transfer, a one-dimensional two-flux method is used and the ray tracing method is also utilized to account for the wave interference effects. It is assumed that each interface is assumed diffusive but the spectral radiative properties are included. It is found that the selective heating region exists for various wavelengths and consequently may contribute to heat the poly-Si film. Using the formalism of the characteristic transmission matrix, the lumped structure reflectance, transmittance, and absorptance are calculated and they are compared with experimental data of the poly-Si film during the SPC process via the FE-RTA (Field-Enhanced RTA) technology.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2004년도 Asia Display / IMID 04
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• pp.1003-1006
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• 2004

We have fabricated poly-Si TFTs at 170$^{\circ}C$ using inductively coupled plasma chemical vapor deposition (ICP-CVD) and excimer laser annealing (ELA). A Poly-Si film with large grains exceeding 5000${\AA}$ and a $SiO_2$ film with high breakdown field are deposited by ICP-CVD. A high mobility exceeding 100$cm^2$/Vs with a low sub-threshold swing of 0.76V/dec was obtained.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2006년도 6th International Meeting on Information Display
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• pp.1162-1165
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• 2006

In this paper, the characteristics of polycrystalline silicon thin-film transistors (poly- Si TFTs) fabricated on polymer substrates are investigated. The a-Si films was laser annealed by using a XeCl excimer laser and a four-mask-processed poly-Si TFT was fabricated with fully self-aligned top gate structure. The fabricated nMOS TFT showed field-effect mobility of ${\sim}30\;cm^2/Vs$, on/off ratio of $10^5$ and threshold voltage of 5 V.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2000년도 하계학술대회 논문집
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• pp.320-323
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• 2000

In the resent years, the Thin Film Transistor Liquid Crystal Display(TFT-LCD) have trend toward larger panel sizes and higher spatial and/or gray-scale resolution. In this trend, Because of its low field effect mobility, a-Si TFT is change to poly-Si TFT. In this paper, both effective-medium model of poly-Si TFTs and empirical capacitance model are applied to Pixel Design Array Simulation Tool (PDAST) and the pixel characteristics of TFT-LCD array were simulated, which were compared with the results calculated by Aim-Spice.

• E2M - 전기 전자와 첨단 소재
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• 제9권1호
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• pp.30-37
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• 1996

Previously, crystallization of a-Si:H films on glass substrates were limited to anneal temperature below 600.deg. C, over 10 hours to avoid glass shrinkage. Our study indicates that the crystallization is strongly influenced by anneal temperature and weakly affected by anneal duration time. Because of the high temperature process and nonconducting substrate requirements for poly-Si TFTs, the employed substrates were limited to quartz, sapphire, and oxidized Si wafer. We report on poly-Si TFT's using high temperature anneal on a Si:H/Mo structures. The metal Mo substrate was stable enough to allow 1000.deg. C anneal. A novel TFT fabrication was achieved by using part of the Mo substrate as drain and source ohmic contact electrode. The as-grown a-Si:H TFT was compared to anneal treated poly-Si TFT'S. Defect induced trap states of TFT's were examined using the thermally stimulated current (TSC) method. In some case, the poly-Si grain boundaries were passivated by hydrogen. A-SI:H and poly-Si TFT characteristics were investigated using an inverted staggered type TFT. The poly -Si films were achieved by various anneal techniques; isothermal, RTA, and excimer laser anneal. The TFT on as grown a-Si:H exhibited a low field effect mobility, transconductance, and high gate threshold voltage. Some films were annealed at temperatures from 200 to >$1000^{\circ}C$ The TFT on poly-Si showed an improved $I_on$$I_off$ ratio of $10_6$, reduced gate threshold voltage, and increased field effect mobility by three orders. Inverter operation was examined to verify logic circuit application using the poly Si TFTs.

• 한국반도체및디스플레이장비학회:학술대회논문집
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• 한국반도체및디스플레이장비학회 2007년도 춘계학술대회
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• pp.179-182
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• 2007

Polycrystaline (poly) 3C-SiC thin film on n-type and p-type Si were deposited by APCVD using HMDS, $H_2$, and Ar gas at $1180^{\circ}C$ for 3 hour. And then the schottky diode with Au/poly 3C-Sic/Si(n-type) structure was fabricated. Its threshold voltage ($V_d$), breakdown voltage, thickness of depletion layer, and doping concentration ($N_D$) value were measured as 0.84 V, over 140 V, 61nm, and $2.7{\times}10^{19}\;cm^3$, respectively. The p-n junction diode fabricated by poly 3C-SiC was obtained like characteristics of single 3C-SiC p-n junction diode. Therefore, its poly 3C-SiC thin films are suitable MEMS applications in conjuction with Si fabrication technology.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2005년도 International Meeting on Information Displayvol.I
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• pp.269-271
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• 2005

Using optimized sputtering condition of a-Si and $SiO_2$ thin film, we can obtained the large grained poly-Si film on PES substrate. The gate dielectric grown by plasma enhanced atomic layer deposition, laser activation and organic interlayer dielectric material make TFTs on PES possible with mobility of $11cm^2/Vs$ (nMOS) and $7cm_2/Vs$ (pMOS).