• Title/Summary/Keyword: poly-Si TFT

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High Performance Poly-Si TFT (${\mu}>290cm^2/Vsec$) Direct Fabricated on Plastic Substrate below $170^{\circ}C$

  • Kwon, Jang-Yeon;Kim, Do-Young;Jung, Ji-Sim;Kim, Jong-Man;Lim, Hyuck;Park, Kyung-Bae;Cho, Hans-S;Zhang, Xiaoxin;Yin, Huaxiang;Xianyu, Wenxu;Noguchi, Takashi
    • 한국정보디스플레이학회:학술대회논문집
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    • 2005.07a
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    • pp.149-152
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    • 2005
  • We present the characterization of poly-Si TFT fabricated below on Plastic Substrate below $170^{\circ}C$ on plastic substrate using excimer laser crystallization of Xe sputtered Si films. Gate insulator with a breakdown field exceeding 8 MV/cm was deposited by using inductively coupled plasma CVD. Finally, we successfully fabricate TFT with a electron field-effect mobility value greater than $290\;cm^2/Vsec$.

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Fabrication of excimer laser annealed poly-si thin film transistor by using an elevated temperature ion shower doping

  • Park, Seung-Chul;Jeon, Duk-Young
    • Electrical & Electronic Materials
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    • v.11 no.11
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    • pp.22-27
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    • 1998
  • We have investigated the effect of an ion shower doping of the laser annealed poly-Si films at an elevated substrate temperatures. The substrate temperature was varied from room temperature to 300$^{\circ}C$ when the poly-Si film was doped with phosphorus by a non-mass-separated ion shower. Optical, structural, and electrical characterizations have been performed in order to study the effect of the ion showering doping. The sheet resistance of the doped poly-Si films was decreased from7${\times}$106 $\Omega$/$\square$ to 700 $\Omega$/$\square$ when the substrate temperature was increased from room temperature to 300$^{\circ}C$. This low sheet resistance is due to the fact that the doped film doesn't become amorphous but remains in the polycrystalline phase. The mildly elevated substrate temperature appears to reduce ion damages incurred in poly-Si films during ion-shower doping. Using the ion-shower doping at 250$^{\circ}C$, the field effect mobility of 120 $\textrm{cm}^2$/(v$.$s) has been obtained for the n-channel poly-Si TFTs.

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Laser crystallization of Si film for poly-Si thin film transistor on plastic substrates

  • Kwon, Jang-Yeon;Cho, Hans-S;Kim, Do-Young;Park, Kyung-Bae;Jung, Ji-Sim;Park, Young-Soo;Lee, Min-Chul;Han, Min-Koo;Noguchi, Takashi
    • 한국정보디스플레이학회:학술대회논문집
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    • 2004.08a
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    • pp.957-961
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    • 2004
  • In order to realize high performance thin film transistor (TFT) on plastic substrate, Si film was deposited on plastic substrate at 170$^{\circ}C$ by using inductivity coupled plasma chemical vapor deposition (ICPCVD). Hydrogen concentration in as-deposited Si film was 3.8% which is much lower than that in film prepared by using conventional plasma enhanced chemical vapor deposition (PECVD). Si film was deposited as micro crystalline phase rather than amorphous phase even at 170$^{\circ}C$ because of high density plasma. By step-by-step Excimer laser annealing, dehydrogenation and recrystallization of Si film were carried out simultaneously. With step-by-step annealing and optimization of underlayer structure, it has succeeded to achieve large grain size of 300nm by using ICPCVD. Base on these results, poly-Si TFT was fabricated on plastic substrate successfully, and it is sufficient to drive pixels of OLEDs, as well as LCDs.

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THE TWO-STEP RAPID THERMAL ANNEALING EFFECT OF THE PREPATTERNED A-SI FILMS (프리 패턴한 비정질 실리콘 박막의 two-step RTA 효과)

  • Lee, Min-Cheol;Park, Kee-Chan;Choi, Kwon-Young;Han, Min-Koo
    • Proceedings of the KIEE Conference
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    • 1998.07d
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    • pp.1333-1336
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    • 1998
  • Hydrogenated amorphous silicon(a-Si:H) films which were deposited by plasma enhanced chemical deposition(PECVD) have been recrystallized by the two-step rapid thermal annealing(RTA) employing the halogen lamp. The a-Si:H films evolve hydrogen explosively during the high temperature crystallzation step. In result, the recrystallized polycrystalline silicon(poly-Si) films have poor surface morphology. In order to avoid the hydrogen evolution, the films have undergone the dehydrogenation step prior to the crystallization step Before the RTA process, the active area of thin film transistors (TFT's) was patterned. The prepatterning of the a-Si:H active islands may reduce thermal damage to the glass substrate during the recrystallization. The computer generated simulation shows the heat propagation from the a-Si:H islands into the glass substrate. We have fabricated the poly-Si TFT's on the silicon wafers. The maximun ON/OFF current ratio of the device was over $10^5$.

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산화물 반도체 TFT를 이용한 투명 디스플레이 기술

  • Hwang, Chi-Seon;Park, Sang-Hui;Jeong, U-Seok;Byeon, Chun-Won;Yu, Min-Gi;Jeong, Seung-Muk;Jo, Du-Hui;Yun, Seong-Min;Yang, Sin-Hyeok;Jo, Gyeong-Ik
    • Proceedings of the Korean Vacuum Society Conference
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    • 2010.02a
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    • pp.48-48
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    • 2010
  • 산화물 반도체를 이용한 TFT는 비교적 우수한 특성과 더불어 간단한 구조와 공정으로 양산성 확보에 유리한 측면 때문에 많은 주목을 받고 있다. TFT-LCD의 경우에는 기존에 사용되고 있는 a-Si;H TFT에 비하여 10배이상 우수한 이동도를 가진 산화물 TFT를 이용하여 고속동작 패널을 구현할 수 있을 것으로 보이며, AMOLED의 경우에는 poly-Si TFT에 비하여 대면적 공정에서 유리한 측면이 있을 수 있다. 이러한 산화물 반도체 TFT를 상용 디스플레이 패널에 적용하기 위해서는 소자 안정성을 좀더 확보해야 하는 숙제가 남아있다. 한편, 산화물 반도체 TFT는 가시광선 영역에서 투명한 특성이 가지고 있기 때문에 이를 이용하여 투명 디스플레이(투명 AMOLED)를 개발하는 경우 투과도를 크게 증가시킬 수 있는 장점을 가지고 있다. 기존의 투명 디스플레이는 주로 투사방법을 이용하여 구현되었지만, 최근 AMOLED를 이용한 투명 디스플레이 시제품이 시연되고 있다. 투명한 AMOLED를 구성하기 위해서는 OLED뿐만 아니라 백플레인에서의 투과도 증대를 위하여 해결해야할 여러 가지 문제가 발생하게 된다. 본 발표에서는 산화물 TFT에서의 최근 이슈에 대해 살펴보고, 투명 디스플레이에의 적용에 있어서 해결해야 할 문제점에 대해서도 살펴보고자 한다.

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Effects of Electrical Stress on Polysilicon TFTs with Hydrogen passivation (다결정 실리콘 박막 트랜지스터의 수소화에 따른 전기적 스트레스의 영향)

  • Hwang, Seong-Soo;Hwang, Han-Wook;Kim, Dong-Jin;Kim, Yong-Sang
    • Proceedings of the KIEE Conference
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    • 1998.07d
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    • pp.1315-1317
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    • 1998
  • We have investigated the effects of electrical stress on poly-Si TFTs with different hydrogen passivation conditions. The amounts of threshold voltage shift of hydrogen passivated poly-Si TFTs are much larger than those of as-fabricated devices both under the gate bias stressing and under the gate and drain bias stressing. Also, we have quantitatively analized the degradation phenomena using by analytical method. we have suggested that the electron trapping in the gate dielectric is the dominant degradation mechanism in only gate bias stressed poly-Si TFT while the creation of defects in the poly-Si is prevalent in gate and drain bias stressed device.

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Field Enhanced Rapid Thermal Process for Low Temperature Poly-Si TFTs Fabrications

  • Kim, Hyoung-June;Shin, Dong-Hoon
    • 한국정보디스플레이학회:학술대회논문집
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    • 2005.07a
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    • pp.665-667
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    • 2005
  • VIATRON TECHNOLOGIES has developed FE-RTP system that enables LTPS LCD and AMOLED manufacturers to produce poly-Si films at low cost, high throughput, and high yield. The system employs sequential heat treatment methods using temperature control and rapid thermal processor modules. The temperature control modules provide exceptionally uniform heating and cooling of the glass substrates to within ${\pm}2^a\;C$. The rapid thermal process that combines heating with field induction accelerates the treatment rates. The new FE-RTP system can process $730{\times}920mm$ glass substrates as thin as 0.4 mm. The uniform nature of poly-Si films produced by FE-RTP resulted in AMOLED panels with no laser-Muras. Furthermore, FE-RTP system also showed superior performances in other heat treatment processes involved in poly-Si TFT fabrications, such as dopant activation, gate oxide densification, hydrogenation, and pre-compaction.

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A Study on the Mis-align during Fabricated Poly-Si TFT on Polymer substrate (고분자 기판위에 Poly-Si TFT 제작시 Mis-align방지를 위한 연구)

  • Kang, Su-Hee;Hwang, Jung-Yeon;Seo, Dae-Shik;Kim, Young-Hun;Moon, Dae-Kyu;Han, Jung-In
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2005.05a
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    • pp.173-176
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    • 2005
  • Teijin사의 HT100-B60의 폴리카보네이트(polycarbonate) $100{\mu}m$, I-Component사의 PES(polyethersulfone) $200{\mu}m$, Ferrania사의 PAR(polyacrylate) $100{\mu}m$$200{\mu}m$를 사용하였다 열팽창계수의 차이로 인해 공정상 기판의 가열과 냉각시 열응력이 발생하여 기판의 크랙발생의 원인이 된다. 이를 최소화하기 위해 모든 공정이 시작하기 전에 pre-annealing을 통해 plastic 기판의 시간별 공정을 실시하였다. plastic film의 annealing time은 0h, 12h, 24, 40h, 50h, 60h, 70h, 80h으로 사간을 달리하여 오븐 안의 진공상태를 조성하여 실험하였다. Thermal evaporator로 Al을 약 170nm 증착하였으며 (주)동진 세미캠의 DTFR-1011s DR LCD용 감광액을 Spin Coating Spread(500rpm/6sec), Spin(3000rpm/20sec)으로 coating하였다.

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Plasma Oxidation Effect on Ultralow Temperature Polycrystalline Silicon TFT on Plastic Substrate

  • Kim, Yong-Hae;Moon, Jae-Hyun;Chung, Choong-Heui;Yun, Sun-Jin;Park, Dong-Jin;Lim, Jung-Wook;Song, Yoon-Ho;Lee, Jin-Ho
    • 한국정보디스플레이학회:학술대회논문집
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    • 2006.08a
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    • pp.1122-1125
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    • 2006
  • The TFT performances were enhanced and stabilized by plasma oxidation of the polycrystalline Si surface prior to the plasma enhanced atomic layer deposition of $Al_2O_3$ gate dielectric film. We attribute the improvement to the formation of a high quality oxide interface layer between the gate dielectric film and the poly-Si film. The interface oxide has a predominant effect on the TFT's characteristics, and is regulated by the gap distance between the electrode and the polycrystalline Si surface.

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ILD(Inter-layer Dielectric) engineering for reduction of self-heating effort in poly-Si TFT (다결정 실리콘 박막 트렌지스터의 self-heating 효과를 감소시키기 위한 ILD 구조 개선)

  • Park, Soo-Jeong;Moon, Kook-Chul;Han, Min-Koo
    • Proceedings of the KIEE Conference
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    • 2002.11a
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    • pp.134-136
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    • 2002
  • 유리기판 위에서 제작된 다결정 실리콘 TFT(Thin Film Transistor) 에서는 열전도율이 낮은 실리콘 산화막 같은 물질이 사용되기 때문에 열에 대해서 낮은 임계점을 갖는다. 이로 인하여. 게이트와 드레인에 높은 전압이 걸리는 조건에서 동작시킬 경우에는 다결정 실리콘 TFT에서의 열화 현상이 두드러지게 나타나게 된다. 그러나, 열전도율이 실리콘 산화막(SiO2) 보다 열배 이상 높은 실리콘 질화막(SiNx)을 ILD(inter-layer dielectric) 재료로 사용했을 때 같은 스트레스 조건에서 다결정 실리콘의 신뢰성이 개선되는 것을 확인할 수 있었다.

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