• 제목/요약/키워드: pole-zero analysis

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Polo-Zero 모델을 이용한 한국어 단독 숫자음 인식 (Recognition of Korean Isolated Digits Using a Pole-Zero Model)

  • 김순협;박규태
    • 대한전자공학회논문지
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    • 제25권4호
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    • pp.356-365
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    • 1988
  • In this paper, we describe an isolated words recognition system for Korean isolated digits based on a voiced -unvoiced decision algorithm and a frequency domain analysis. The algorithm first performs a voiced-unvoiced decision procedure for the begtinning part of each uttered work using the normalized log energy and zero crossing rate as decision parameters. Based on this decision,. each word is assigned to one of two classes. In order to identify the uttered word within each class, a dynamic time warping algorithm is applied using formant frequencies as the basis for the distance measure. We exploit a pole-zero analysis to measure formant frequencies in each frame. We have observed that pole-zero analysis can provide more accurate estimation of formant frequencies than analysis based on poles only. Experimental recognition rates of 97.3% illustrating the performance of the recognition system was achieved.

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EMI Prediction and Reduction of Zero-Crossing Noise in Totem-Pole Bridgeless PFC Converters

  • Zhang, Baihua;Lin, Qiang;Imaoka, Jun;Shoyama, Masahito;Tomioka, Satoshi;Takegami, Eiji
    • Journal of Power Electronics
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    • 제19권1호
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    • pp.278-287
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    • 2019
  • In this study, a zero-crossing spike current issue in a totem-pole bridgeless power factor correction (PFC) converter is comprehensively investigated for the first time. Spike current occurs when input voltage crosses zero, becomes a noise source, and causes severe common mode emission issues. A generation mechanism for electromagnetic interference (EMI) is presented to investigate the EMI problem caused by zero-crossing issue, and a noise spectrum due to this issue is predicted by a theoretical analysis based on the Fourier coefficient of an approximate spike current waveform. Furthermore, a noise reduction method is proposed and then improved to reduce the spike current. Experimental measurements are implemented on a GaN-based totem-pole bridgeless PFC converter, and the spike current can be effectively suppressed through the proposed method. Furthermore, the noise spectrums measured without and with the reduced zero-crossing spike current are compared. Experimental results validate the analysis of the noise spectrum caused by the zero-crossing spike current issue.

영전압 스위칭 3-레벨 보조 공진 폴 인버터 (Zero-voltage-switching three level auxiliary resonant commutated pole inverter)

  • 유동욱;원충연;조정구;백주원
    • 대한전기학회논문지
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    • 제45권4호
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    • pp.535-542
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    • 1996
  • A zero voltage switching (ZVS) three level auxiliary resonant commutated pole inverter (ARCPI) is presented for high power GTO inverters. The concept of ARCP for two level inverter is extended to the three inverter. The proposed auxiliary commutation circuit consists of one resonant inductor and two bi-directional switches, which provides ZVS condition to the main devices without increasing device voltage or current stresses. The auxiliary device operates with zero current switching (ZCS) which enables use of the low cost thyristors. The proposed ARCPI can handle higher voltage and higher power (1-10MVA) comparing to the two level one. Operation and analysis of the ARCPI are illustrated and the features are compared o those of the snubber circuit incorporated three level inverter. Experimental results with 10kW, 4kHz prototype are presented to verify the principle of operation. (author). refs., figs., tab.

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An LTCC Linear Delay Filter Design with Interdigital Stripline Structure

  • Hwang, Hee-Yong;Kim, Seok-Jin;Kim, Hyeong-Seok
    • KIEE International Transactions on Electrophysics and Applications
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    • 제4C권6호
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    • pp.300-305
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    • 2004
  • In this paper, new design equations based on the pole-zero analysis for multi-layered interdigital stripline linear group delay bandpass filter with tap input ports are presented. As a design example, a four-pole group delay filter with center frequency of 2.14GHz, bandwidth of 160MHz, and group delay variation of $\pm$0.1nS for LTCC technology or multilayered PCB technology is designed. In the design process, it is not necessary to simulate the entire structure, as the simulation of half structures is sufficient. Good results can be attained after the optimizing process was performed three times using the proposed equations and a commercial EM simulator.

배전선로 장주의 중성선 전류 계산 (Neutral Current Calculation of Electric Pole in Distribution Line)

  • 서훈철;김철환;정창수;유연표;이천원
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2005년도 추계학술대회 논문집 전력기술부문
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    • pp.87-89
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    • 2005
  • If the three phases are not balanced, the current in neutral line is not zero. Then, the induced voltage can be generated In communication line. The KEPCO's rule about unbalanced current in single electric pole is a twenty percent of phase current. But the unbalanced current in double electric pole can't decide the rule because there are many different views. This paper develops the calculation and analysis technique of neutral current in single electric pole and double electric pole using equivalent circuit analysis, vector analysis and EMTP simulation.

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새로운 ZVS 3-레벨 공진폴 인버터 (A Novel ZVS 3-Level Resonant Pole Inverter)

  • 백주원;조정구;유동욱;송두익;원충언
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1995년도 하계학술대회 논문집 A
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    • pp.360-364
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    • 1995
  • A zero voltage switching (ZVS) three level resonant pole inverter is presented for high power GTO inverters. The concept of auxiliary resonant commutated pole(ARCP) for two level inverter is extended to the three level inverter. The proposed auxiliary commutation circuit consists of one resonant inductor and two bi-directional switches, which provides ZVS condition to the main devices without increasing device voltage or current stresses. The auxiliary device operates with zero current switching(ZCS) which enables use of the low cost thyristors. The proposed circuit can handle higher voltage and higher power(1-10MVA) comparing to the two level one. Operation and analysis of the proposed circuit are illustrated. Experimental results with 10 KW, 4 kHz prototype are presented to verify the principle of operation.

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가공 배전선로 장주의 중성선 전류 계산 (Neutral Current Calculation of Pole-Top Overhead Distribution Line)

  • 서훈철;권오상;김철환;정창수;유연표
    • 대한전기학회논문지:전력기술부문A
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    • 제55권7호
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    • pp.290-296
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    • 2006
  • If the three phases are not balanced, the current in neutral wire is not zero. Then, the induced voltage can be generated in communication line. The KEPCO's rule about unbalanced current for one step type in distribution pole is a twenty percent of phase current. But the unbalanced current for two step type in distribution pole can't decide the rule because there are many different views. This paper presents the calculation and analysis technique of neutral current in distribution poles using equivalent circuit analysis and EMTP simulation.

시스템 식별법을 이용한 선체운동 해석에 관한 연구 (A Study on the analysis of ship motion using system identification method)

  • 송재영;임정빈
    • 한국항해항만학회:학술대회논문집
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    • 한국항해항만학회 2019년도 추계학술대회
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    • pp.271-271
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    • 2019
  • 선체운동은 외력관계 등 복잡한 환경에서 발생하므로 추정이 난해하다. 선체운동의 추정은 선박의 안전을 확보할 수 있는 중요한 요소이므로 정확한 추정이 필요한 실정이다. 기존의 선체운동관련 연구는 특정 선형에 대한 선체운동을 실험하여 획득한 모델과 기준이되는 모델의 겉보기 운동을 비교한 것으로 선체운동을 직관적으로 추정하기 난해하다. 본 연구에서는 선형-시불변 (Linear-Time lnvariant)시스템의 전달함수 기법을 적용해 선체운동을 극-영점 해석과 주파수 응답 분석을 통해 선체운동의 특성을 전달함수로 추정하는 개념을 소개한다. 선형-시불변 시스템을 이용한 선체운동 해석 모델은 1)파랑의 입력신호와, 2)선체운동의 출력신호, 3)블랙박스로 정의된 선체로 구성된다. 본 모델은 선체운동을 전달함수로 수치화 하여 정의할 수 있고, 극-영점해석 및 주파수 응답 분석을 통해 선체운동의 특성을 추정하는데 용이할 것으로 기대된다.

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Small-Signal Analysis of a Differential Two-Stage Folded-Cascode CMOS Op Amp

  • Yu, Sang Dae
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제14권6호
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    • pp.768-776
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    • 2014
  • Using a simplified high-frequency small-signal equivalent circuit model for BSIM3 MOSFET, the fully differential two-stage folded-cascode CMOS operational amplifier is analyzed to obtain its small-signal voltage transfer function. As a result, the expressions for dc gain, five zero frequencies, five pole frequencies, unity-gain frequency, and phase margin are derived for op amp design using design equations. Then the analysis result is verified through the comparison with Spice simulations of both a high speed op amp and a low power op amp designed for the $0.13{\mu}m$ CMOS process.

Multi-Finger MOSFET의 바이어스 종속 S11-파라미터 분석 (An Analysis of Bias-Dependent S11-Parameter in Multi-Finger MOSFETs)

  • 안자현;이성현
    • 전자공학회논문지
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    • 제53권12호
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    • pp.15-19
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    • 2016
  • 매우 큰 사이즈를 가진 multi-finger RF MOSFET의 $S_{11}$-parameter에서 스미스차트의 저항 circle 라인을 벗어나는 kink 현상의 게이트 바이어스 종속 특성이 관찰되었다. 이러한 바이어스 종속성은 $S_{11}$-parameter의 크기와 위상, 입력저항, 입력 커패시턴스의 주파수 응답곡선을 측정하여 최초로 분석되었다. 그 결과 입력 커패시턴스의 크기와 입력저항의 dominant pole과 zero 주파수에 의해 $V_{gs}$ 종속 kink 현상이 크게 변하는 것을 알 수 있다. $V_{gs}=0V$일 때 매우 적은 $S_{11}$-parameter 위상차와 입력저항의 높은 pole 주파수에 의해 고주파영역에서 kink 현상이 나타난다. 하지만 $V_{gs}$가 높아지면 $S_{11}$-parameter 위상차가 크게 증가하고 pole 주파수가 낮아져 저주파영역에서 kink 현상이 발생하게 된다.