• Journal of Radiation Protection and Research
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• 제43권4호
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• pp.131-136
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• 2018

Background: We investigated the current characteristics of a thin-film Ag electrode on a chemical vapor deposition (CVD) diamond. The CVD diamond is widely recognized as a radiation detection material because of its high tolerance against high radiation, stable response to various dose rates, and good sensitivity. Additionally, thin-film Ag has been widely used as an electrode with high electrical conductivity. Materials and Methods: Considering these properties, the thin-film Ag electrode was deposited onto CVD diamonds with varied deposition thicknesses (${\fallingdotseq}50/98/152/257nm$); subsequently, the surface thickness, surface roughness, leakage current, and photo-current were characterized. Results and Discussion: The leakage current was found to be very low, and the photo-current output signal was observed as stable for a deposited film thickness of 98 nm; at this thickness, a uniform and constant surface roughness of the deposited thin-film Ag electrode were obtained. Conclusion: We found that a CVD diamond radiation detector with a thin-film Ag electrode deposition thickness close to 100 nm exhibited minimal leakage current and yielded a highly stable output signal.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2008년도 춘계학술대회 및 기술 세미나 논문집 디스플레이 광소자
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• pp.55-56
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• 2008

The photo leakage currents of a conventional hydrogenated amorphous silicon(a-Si:H) thin film transistor(TFT) were investigated and analyzed in the case of illumination from various lightsources such as halogen lamp, cold cathode fluorescent lamp(CCFL) backlight, and white light emitting diode(LED) backlight The photo leakage characteristics showed the apparent differences in the leakage level and in the $I_{on}/I_{off}$ ratio in spite of the similar luminances of light sources. This leakage level is expected to be related to the wavelength of the lowest intensity peak from spectral analysis of light sources.

• 한국전기전자재료학회논문지
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• 제21권9호
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• pp.844-847
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• 2008

The photo leakage currents of a conventional hydrogenated amorphous silicon(a-Si:H) thin film transistor(TFT) were investigated and analyzed in case of illumination from various light sources such as halogen lamp, cold cathode fluorescent lamp(CCFL) backlight, and white light emitting diode(LED) backlight. The photo leakage characteristics showed the apparent differences in the leakage level and in the $I_{on}/I_{off}$ ratio in spite of the similar luminances of light sources. This leakage level is expected to be related to the wavelength of the lowest intensity peak from the spectral characteristics of light sources.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2008년도 International Meeting on Information Display
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• pp.572-575
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• 2008

Photo leakage characteristics of a-Si:H TFT were obtained for the illuminations from various backlight sources and the results were compared and analyzed in terms of the photoelectric properties of light. The analysis shows that the photocurrents are related to the wavelengths of the peak intensities of the spectrums of light sources.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1995년도 하계학술대회 논문집 C
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• pp.1085-1087
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• 1995

A large leakage current may be one of the critical issues for poly-silicon thin film transistors(poly-Si TFTs) for LCD applications. In order to reduce the leakage current of poly-Si TFTs, several offset gated structures have been reported. However, those devices, where the offset length in the source region is not same as that in the drain region, exhibit the asymmetric electrical performances such as the threshold voltage shift and the variation of the subthreshold slope. The different offset length is caused by the additional mask step for the conventional offset structures. Also the self-aligned implantation may not be applicable due to the mis-alignment problem. In this paper, we propose a new fabrication method for poly-Si TFTs with a self-aligned offset gated structure by employing a photo resistor reflow process. Compared with the conventional poly-Si TFTs, the device is consist of two gate electrodes, of which one is the entitled main gate where the gate bias is employed and the other is the entitled subgate which is separate from both sides of the main gate. The poly-Si channel layer below the offset oxide is protected from the injected ion impurities for the source/drain implantation and acts as an offset region of the proposed device. The key feature of our new device is the offset lesion due to the offset oxide. Our experimental results show that the offset region, due to the photo resistor reflow process, has been successfully obtained in order to fabricate the offset gated poly-Si TFTs. The advantages of the proposed device are that the offset length in the source region is the same as that in the drain region because of the self-aligned implantation and the proposed device does not require any additional mask process step.

• Transactions on Electrical and Electronic Materials
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• 제18권4호
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• pp.225-228
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• 2017

In this study, zinc tin oxide (ZTO) films were prepared on indium tin oxide (ITO) glasses and annealed at different temperatures under vacuum to investigate the correlation between the Ohmic/Schottky contacts, electrical properties, and bonding structures with respect to the annealing temperatures. The ZTO film annealed at $150^{\circ}C$ exhibited an amorphous structure because of the electron-hole recombination effect, and the current of the ZTO film annealed at $150^{\circ}C$ was less than that of the other films because of the potential barrier effect at the Schottky contact. The drift current as charge carriers was similar to the leakage current in a transparent thin-film device, but the diffusion current related to the Schottky barrier leads to the decrease in the leakage current. The direction of the diffusion current was opposite to that of the drift current resulting in a two-fold enhancement of the cut-off effect of leakage drift current due to the diffusion current, and improved performance of the device with the Schottky barrier. Hence, the thin film with an amorphous structure easily becomes a Schottky contact.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2005년도 International Meeting on Information Displayvol.I
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• pp.280-284
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• 2005

Recently, the demands of the high quality LCD display device have increased. We have developed the smart LCD that photo sensor is integrated in. Amorphous silicon TFTs have photo leakage current characteristics when the channel of TFTs are lighted on. This characteristic has applied in our device. We expect that photo sensor integrated LCDs have lots of merits in mobile display device, note PC panel and LCD TV.

• 한국진공학회지
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• 제18권2호
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• pp.147-150
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• 2009

Polydimethylsiloxane (PDMS) 기능성 박막을 도입하여 적은 게이트 누설 전류 특성을 가지는 유기트랜지스터를 제작하고 평가하였다. UV/ozone 처리를 하여 PDMS 표면에 위치한 소수성의 메틸 그룹의 화학적 결합을 끊어 친수성 실리콘 산화막 성질로 표면을 변화시키고 선택적인 펜타신 증착을 유도하였다. Off 전압상태 ($V_g-V_t>0$)에서 게이트 전압에 의해 기인하는 누설 전류는 선형영역 ($V_d=-5\;V$)과 포화영역 ($V_d=-30\;V$)에서 ${\sim}10^{-10}$ A의 값을 보여주며 기존의 트랜지스터 보다 개선된 누설 전류 특성을 나타내었다.

• Korean Chemical Engineering Research
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• 제48권6호
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• pp.737-740
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• 2010

높은 누설 전류와 문턱 전압의 이동은 비정질 실리콘(a-Si:H) 트랜지스터(TFT)의 단점이다. 이러한 특성은 게이트 절연체와 활성층 박막의 막 특성, 표면 거칠기와 공정 조건에 따라 영향을 받는다. 본 연구의 목적은 누설 전류와 문턱 전압의 특성을 개선하는데 목적이 있다. 게이트 절연체의 공정 조건에 대해서는 질소를 증가한 증착 공정 조건을 적용하였고, 활성층의 공정 조건에 대해서는 산소를 증가한 공정 조건을 적용하여 전자 포획을 감소시키고 박막의 밀도를 증가시켰다. $I_{off}$는 $65^{\circ}C$ 조건하에서 1.01 pA에서 0.18pA로, ${\Delta}V_{th}$는 -1.89 V에서 -1.22V로 개선되었다.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2009년도 9th International Meeting on Information Display
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• pp.312-314
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• 2009

We have fabricated pentacene based organic thin film transistors (OTFTs) with formulated poly[4-vinylphenol] (PVP) gate dielectrics. The gate dielectrics is composed of PVP, poly[melamine-coformaldehyde] (PMF) and photo-initiator [1-phenyl-2-hydroxy-2-methylpropane-1-one, Darocur1173]. By adding small amount (1 %) of photo-initiator, the cross-linking temperature is lowered to $115^{\circ}C$, which is lower than general thermal curing reaction temperature of cross-linked PVP (> $180^{\circ}C$). The hysteresis and the leakage current of the OTFTs are also decreased by adding the PMF and the photoinitiator in PVP gate dielectrics.