• 제목/요약/키워드: phasor

검색결과 183건 처리시간 0.038초

실시간 계통제어를 위한 동기위상측정장치 개발 (The development of synchronized phasor measurement device for real time power system control)

  • 전진홍;김학만;전영환;국경수;김지원;오태규
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2000년도 하계학술대회 논문집 A
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    • pp.85-87
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    • 2000
  • In real-time power system control, it is essential to measure the power system variables which are voltage. current, real and reactive power, power factor, system frequency and etc. this variables can be estimated or calculated by the synchronized phasor informations of voltage and current. Therefore, the synchronized phasor measurement of voltage and current is very important to real-time power system control. So, we develop SPMD(Synchronized Phasor Measurement Device) for synchronized phasor measurement of voltage and current. In this paper, we present the design and implementation of SPMD for real-time phasor measurement and prove its performance by the test results.

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DFT 기반의 개선된 페이저 연산 기법을 적용한 거리계전 알고리즘 (Distance Relaying Algorithm Using a DFT-based Modified Phasor Estimation Method)

  • 이동규;강상희
    • 전기학회논문지
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    • 제59권8호
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    • pp.1360-1365
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    • 2010
  • In this paper, we propose a distance relaying algorithm using a Discrete Fourier Transform (DFT)-based modified phasor estimation method to eliminate the adverse influence of exponentially decaying DC offsets. Most distance relays are based on estimating phasors of the voltage and current signals. A DFT is generally used to calculate the phasor of the fundamental frequency component in digital protective relays. However, the output of the DFT contains an error due to exponentially decaying DC offsets. For this reason, distance relays have a tendency to over-reach or under-reach in the presence of DC offset components in a fault current. Therefore, the decaying DC components should be taken into consideration when calculating the phasor of the fundamental frequency component of a relaying signal. The error due to DC offsets in a DFT is calculated and eliminated using the outputs of an even-sample-set DFT and an odd-sample-set DFT, so that the phasor of the fundamental component can be accurately estimated. The performance of the proposed algorithm is evaluated for a-phase to ground faults on a 345 kV, 50 km, simple overhead transmission line. The Electromagnetic Transient Program (EMTP) is used to generate fault signals. The evaluation results indicate that adopting the proposed algorithm in distance relays can effectively suppress the adverse influence of DC offsets.

Algorithm for Fault Location Estimation on Transmission Lines using Second-order Difference of a Positive Sequence Current Phasor

  • Yeo, Sang-Min;Jang, Won-Hyeok;Kim, Chul-Hwan
    • Journal of Electrical Engineering and Technology
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    • 제8권3호
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    • pp.499-506
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    • 2013
  • The accurate estimation of a fault location is desired in distance protection schemes for transmission lines in order to selectively deactivate a faulted line. However, a typical method to estimate a fault location by calculating impedances with voltages and currents at relaying points may have errors due to various factors such as the mutual impedances of lines, fault impedances, or effects of parallel circuits. The proposed algorithm in this paper begins by extracting the fundamental phasor of the positive sequence currents from the three phase currents. The second-order difference of the phasor is then calculated based on the fundamental phasor of positive sequence currents. The traveling times of the waves generated by a fault are derived from the second-order difference of the phasor. Finally, the distance from the relaying point to the fault is estimated using the traveling times. To analyze the performance of the algorithm, a power system with EHV(Extra High Voltage) untransposed double-circuit transmission lines is modeled and simulated under various fault conditions, such as several fault types, fault locations, and fault inception angles. The results of the simulations show that the proposed algorithm has the capability to estimate the fault locations with high speed and accuracy.

페이저도에 의한 임피던스 정합회로 설계 해석 (Design Analysis of Impedance Matching Circuit by Phasor Plot)

  • 원라경
    • 한국정보통신학회논문지
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    • 제26권11호
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    • pp.1686-1696
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    • 2022
  • 본 논문에서 소개하는 페이저도에 의한 임피던스 정합회로 설계는 회로이론의 임피던스 삼각도에 기초한다. 정합회로 설계에 주어진 값들을 이용하여 페이저 도형의 작도를 통하여 설계하는 기법이다. 설계 패턴은 L형, 역L형, T형, 𝜋형을 기본으로, 미지의 리액턴스 소자를 페이저 도형을 통하여 결정한다. 본 논문에서는 입력과 출력포트가 순저항인 경우와 리액턴스를 갖는 경우의 몇 가지 사례에 대하여 설계하고 이를 직병렬 등가변환에 의하여 설계값을 검증하여 정합이 이루어짐을 확인하였다. 본 설계 기법은 입출력 위상이나 크기를 바로 파악할 수 있어 설계의 변경과 적용이 신속하여 주로 낮은 주파수 대역에서 적용이 기대된다.

DC 옵셋의 영향을 제거한 페이저 연산 기법 (Phasor Estimation Method Eliminating the Effect of the DC offsets)

  • 이동규;김형규;권영진;강상희
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2009년도 제40회 하계학술대회
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    • pp.203_204
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    • 2009
  • In this paper, we propose a Fourier transform-based modified phasor estimation method to eliminate the adverse influence of exponentially decaying DC offsets. Discrete Fourier Transform (DFT) is generally used to calculate the phasor of the fundamental frequency component in digital protective relays. However, the output of the DFT contains an error due to exponentially decaying DC offsets. Therefore, the decaying DC components should be taken into consideration when calculating the phasor of the fundamental frequency component of a relaying signal. In this paper, the error due to DC offsets in a DFT is calculated and eliminated using the outputs of quaternity DFT, so that the phasor of the fundamental component can be accurately estimated. The performance of the proposed algorithm is evaluated by using computer-simulated signals and EMTP-generated signals. A performance evaluation showed that the proposed algorithm was not affected by system and fault conditions. Thus, the proposed algorithm can effectively suppress the adverse influence of DC offsets in a relaying signal.

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PMU 설치에 따른 가관측성 해석 (Observability Analysis for Phasor Measurement Unit Placement)

  • 강석주;조기선;김희철;신중린
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1999년도 하계학술대회 논문집 C
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    • pp.1049-1053
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    • 1999
  • It is important to measuring and monitoring about state vectors of power system for precise operation control. All state vectors cannot be measured because it is economically disadvantageous, so that some state vectors are determined using state estimator. Determination of observability is a important precondition of power system state estimation because state estimation can be performed when given power system is observable. Recently as time-synchronization technique progress, using the PMU(Phasor Measurement Unit), state vector can be measured directly so that voltage phasor and current phasor measurements can be used for power system estimation. In this paper, observability algorithm is proposed to determinate the observability with real/reactive injection power measurements and real/reactive lineflow power measurements of existing measurement system and with phasor measurements of PMU. The jacobian matrix is newly composed for state estimation with measurements of added PMU, and state estimation is performed with least square estimatior. Comparison between state estimation result of existing measurement system and that of measurement system added PMU is presented.

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전류 페이저를 이용한 송전선로 고장점 추정 알고리즘 (Estimation of Fault Location on Transmission Lines using Current Phasor)

  • 여상민;김철환
    • 전기학회논문지
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    • 제58권11호
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    • pp.2095-2100
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    • 2009
  • Since most of the Extra High Voltage (EHV) transmission lines are untransposed and multi-circuits, errors are occurred inevitably because of the unbalanced impedances of the lines and so on. Therefore, a distance relaying algorithm applicable to the untransposed multi-circuits transmission lines needs to be developed. The proposed algorithm of fault location estimation in the paper uses the fundamental phasor to reduce the effects of the harmonics. This algorithm also analyzes the second-order difference of the phasor to calculate the traveling times of waves generated by faults. The traveling time of the waves generated by faults is derived from the second-order difference of the phasor. Finally, the distance from the relaying point to the faults is estimated using the traveling times. To analyze the performance of the algorithm, a power system with the EHV untransposed double-circuit transmission lines are modeled and simulated under various fault conditions such as several fault types, fault locations, fault inception angles and fault resistances. The results of the simulations show that the proposed algorithm has the capability to estimate the fault locations quickly and accurately.

Phasor 제어형 SIT 고주파 공진 Inverter (Phasor Control-Based High Frequency Resonance Inverter using Power SIT)

  • 정원영;노채균;김동희;소정훈
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1994년도 하계학술대회 논문집 A
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    • pp.382-384
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    • 1994
  • This paper proposed a novel High Frequency resonant inverter having drive signal phasor shift control function. The operating characteristics of this inverter circuit are discussed from a thereotical point of view and comparated with experimental results.

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고속 FIR 필터와 두 페이저 위상을 이용한 주파수 추정 알고리즘의 비교 연구 (A Comparative Study of Frequency Estimation Techniques using High Speed FIR Filter and Phasor Angle between Two Phasors)

  • 박철원
    • 전기학회논문지P
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    • 제58권2호
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    • pp.122-129
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    • 2009
  • Frequency is an important operating parameter of a power system. It is essential that the frequency of a power system be maintained very close to its nominal frequency. And frequency measurement devices have need to measure a fast and accurate of frequency using voltage signals. This paper proposes a comparative study of frequency estimation techniques using the high speed FIR filter based algorithm, the DFT filter based algorithm using phasor angle between two phasors, and positive sequence component based algorithm using the half angle between two successive positions of phasor. The discussed three techniques have been formed through numerical manipulation of a discrete system. The proposed techniques have been tested using signals obtained from selected power system model using ATP simulation package. Some test results are shown in this paper.

새로운 직류 옵셋 제거 필터에 의한 정확한 페이저 추출에 관한 연구 (A Study on Accurate Phasor Extraction Using a New DC Offset Elimination Filter)

  • 박철원;윤희환
    • 조명전기설비학회논문지
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    • 제27권7호
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    • pp.29-36
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    • 2013
  • In this paper, a new DC offset elimination filter is proposed for an accurate phasor extraction of fundamental frequency component. The proposed method can eliminate a DC offset component which is decayed exponentially. The proposed method uses only one cycle of data for phasor extraction computation, which does not need to preset the time constant of the DC offset component. Also, the other advantages of the proposed method is that gain compensation or phase compensation is not required after filtering. Simulations using ATP were performed to evaluate the performance of the proposed filter method, and the results were compared to the ones obtained by conventional methods.