• Journal of Advanced Marine Engineering and Technology
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• v.35 no.7
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• pp.966-973
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• 2011

Power distribution onboard vessel is typically configured as ungrounded system due to the ability to continuously supply electric power even when an earth fault occurs. The impedance connections between 3 phase power lines and hull cause the line-to-hull voltages to become unstable and increased in case the impedances are unbalanced, bringing the situation susceptible to electric shock and deterioration of insulation material. Also the line-to-hull voltage can reach to a certain maximum value in the steady state depending on the distributed capacitances and grounding resistances between lines and hull. This study suggests how to find and calculate the maximum line-to-hull voltage in view of magnitude and phase angle based on the vector diagram.

• Journal of the Institute of Convergence Signal Processing
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• v.20 no.1
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• pp.57-62
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• 2019

In this paper, oneM2M based data monitoring and acquisition system is designed and implemented to measure and transmit the voltage, current, temperature, acceleration and vibration of the motor. The proposed system can detect electrical faults (overcurrent, reverse phase, phase loss, ground fault) and mechanical faults (MC counter, motor operation time, bearing and winding temperature, motor speed, insulation resistance). The system consists of sensor data collection, web server, php, database, wired/wireless communication system. The insulation resistance and the motor speed were measured, and the experimental results were similar for both the test resistance value and the reference input value.

• The Transactions of the Korean Institute of Power Electronics
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• v.6 no.2
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• pp.173-179
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• 2001

This paper represents the control algorithm of the instantaneous voltage sag corrector for the power quality enhancement in distribution line. Especially, a novel detection technique of the symmetrical components is proposed for the analysis of the three-phase unbalanced and asymmetrical problems caused by the single line ground fault which is he most frequent event. This proposed method is based on the simple calculation and the control references of the symmetrical components for voltage compensation can be described as dc value without any other phase detection procedure. And also, for the generation of the reference voltages, the UF and MF defined by IEC is considered. Using this proposed control algorithm, the compensator has the fast dynamic characteristics and the THD of the compensated voltage waveform is very low. Finally, the validity of the proposed algorithm is proved by the PSCAD/EMTDC simulation and experimental results.

• Proceedings of the IEEK Conference
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• 1998.06a
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• pp.811-814
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• 1998

REcent research about current testing($\textrm{I}_{DDQ}$ testing) has been emphasizing that $\textrm{I}_{DDQ}$ testing in addition to the logical voltage testing is necessary to increase the fault coverage. The $\textrm{I}_{DDQ}$. testing can detect physical faults other than the classical stuck-at type fault, which affect reliability. One of the most critical issues in the $\textrm{I}_{DDQ}$ testing is to insert a built-in current sensor (BICS) that can detect abnormal static currents from the power supply or to the ground. This paper presents a new BICS for internal current testing for large CMOS logic circuits. The proposed BICS uses a single phase clock to minimize the hardware overhead. It detects faulty current flowing and converts it into a corresponding logic voltage level to make converts it into a corresponding logic voltage level to make it possible to use the conventional voltage testing techniqeus. By using current mirroring technique, the proposed BICS can work at very high speed. Because the proposed BICS almost does not affects normal operation of CUT(circuit under test), it can be used to a very large circuit without circuit partitioning. By altenating the operational modes, a circuit can be $\textrm{I}_{DDQ}$-tested as a kind of self-testing fashion by using the proposed BICS.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.59 no.8
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• pp.1360-1365
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• 2010

In this paper, we propose a distance relaying algorithm using a Discrete Fourier Transform (DFT)-based modified phasor estimation method to eliminate the adverse influence of exponentially decaying DC offsets. Most distance relays are based on estimating phasors of the voltage and current signals. A DFT is generally used to calculate the phasor of the fundamental frequency component in digital protective relays. However, the output of the DFT contains an error due to exponentially decaying DC offsets. For this reason, distance relays have a tendency to over-reach or under-reach in the presence of DC offset components in a fault current. Therefore, the decaying DC components should be taken into consideration when calculating the phasor of the fundamental frequency component of a relaying signal. The error due to DC offsets in a DFT is calculated and eliminated using the outputs of an even-sample-set DFT and an odd-sample-set DFT, so that the phasor of the fundamental component can be accurately estimated. The performance of the proposed algorithm is evaluated for a-phase to ground faults on a 345 kV, 50 km, simple overhead transmission line. The Electromagnetic Transient Program (EMTP) is used to generate fault signals. The evaluation results indicate that adopting the proposed algorithm in distance relays can effectively suppress the adverse influence of DC offsets.

• Proceedings of the KIEE Conference
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• 1999.07c
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• pp.1180-1182
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• 1999

Modeling for utility interactive photovoltaic power generation system has been studied using PSCAD/EMTDC. The proposed model system consists of a simple utility circuit configuration, 3kW of single phase utility interactive photovoltaic system, single phase PWM voltage source inverter module, and feed forward PID controller as control circuit. In the system, the DC current is assumed constant, and the voltage source inverter provides sinusoidal ac current for the loads of utility system. The simulation results are given in order to verify the effectiveness of the proposed model. The phases of output voltage of utility system and the output current of the inverter module are compared. Especially, the compensation effect of the photovoltaic system for the unbalanced load is analyzed. and the transient phenomena for a phase to ground fault are also simulated.

• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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• 2006.05a
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• pp.264-267
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• 2006

This paper describes the accident analysis by modeling the current transformer mounting in meaium voltage metal-clad switchgear(MCSG). In analyzing the accident the reconstruction at the current transformer mounting(VCB connecting guide) has to be taken into account. The accident was modelled as a 3-phase ground fault mounting between the end plate of a high voltage lines and the safety shutter at the current transformer mounting of the VCB inside the metal clad switchgear. Since the outside maintenance of the metal clad switchgear is restricted by the enclosed compartments, its circumference has to be kept clean. Through the reconstruction results, it was confirmed that the fault of the enclosed switchboard could be reduced when the shutter made of Fe material was changed into an insulation.

• Journal of the Society of Disaster Information
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• v.20 no.3
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• pp.541-548
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• 2024

Purpose: This study aims to compare the grounding methods of transformers currently used in most industrial sites in Korea to analyze the stability of power quality and the risk of electric shock. Method: The ungrounded method allows for continuous power supply even in the event of a single-phase ground fault, resulting in a lower risk of electric shock. In contrast, the solidly grounded method focuses on quickly cutting off power during incidents such as ground faults or lightning strikes to protect load equipment, as explained through literature comparison. Result and Conclusion: It is concluded that the ungrounded method is preferable in environments where continuous power supply is essential.

• Progress in Superconductivity and Cryogenics
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• v.13 no.1
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• pp.46-50
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• 2011

The electrical insulation design of high voltage superconducting fault current limiters (SFCLs) should be confirmed to be applied for the stabilization of the power grid. This paper describes numerical analysis and AC dielectric experiments for developing high voltage SFCLs. The electric field distributions between applied high voltage part and ground were calculated by finite element method (FEM) simulation tool and AC criterion of liquid nitrogen at 200 kPa was calculated from correlation between the field utilization factor and FEM simulation results. This paper deals with ceonceptual insulation design of a 154 kV class single-phase no-inductively wound solenoid type SFCL which was focused on gap distance between the cryostat and superconducting coils. Furthermore, the shield ring effect was confirmed to reduce maximum electric field at applied high voltage part.

• Journal of the Korean Society of Safety
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• v.27 no.6
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• pp.43-47
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• 2012

The unbalance currents flow the High Temperature Superconducting (HTS) power cable caused by asymmetrical fault, harmonic distortion and unbalanced load. That problem causes additional loss and leakage field in the HTS power cable, and deteriorates the electric power quality and stability. In addition, large amounts of unbalanced current can cause negative sequence and ground relays to operate. This paper presents an analysis unbalanced three-phase current distribution in HTS power cable caused by unbalanced load condition and grounding methods using PSCAD/EMTDC. The results obtained through the analysis would provide important data for the design of HTS power cables and valid information for their installation in power system.