• The Journal of Korean Institute of Communications and Information Sciences
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• v.39A no.2
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• pp.100-108
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• 2014

In this paper, we design SSD(simultaneous single band duplex) system using RF(radio frequency) cancellation and digital cancellation. we analyze characteristic of residual self-interference after RF Cancellation signal when error of phase shifter occur in RF cancellation. When phase shifter error of $0^{\circ}$, $0.5^{\circ}$, $1^{\circ}$ and $2^{\circ}$ occur in RF cancellation, residual self-interference signal power after RF cancellation is bigger than desired signal power of distant station. So, it is impossible to receive transmit data of distant station. but we confirm that it is possible to receive transmit data of distant station by digital cancellation with frame structure. Also, in digital cancellation with frame structure, if residual self-interference signal after RF cancellation is too large then LMS algorithm requires more time to estimate self-interference channel. That is, performance degradation occurs because self-interference channel estimation has not completed in estimation frame.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2006.05a
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• pp.632-636
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• 2006

It is needed to use the beam scanning to control the cell coverage of the base station considering operation conditions, season, time period, radiation character and mobility of customers and vehicles for varied wireless communication service and quality improvement. This paper proposes a mobile antenna system which can obtain the characteristics of the beam scanning by controlling the directivity depending on the operation condition. Radiation block is made of 2 sub-array of $1\times3$ patched antennas for ITS of 5.8GHZ bandwidth with the gain of 13dBi, and of 2 sub-array of single patched antenna for WiBro of 2.3GHZ bandwidth with the gain of 12dBi. RF module is made of a switch, an amplifier, a PAD, a 3-Bit phase shifter, and a power divider. The system is able to control the beam tilting with electronic methode by using 3-bit phase shifter$(45^{\circ},\;90^{\circ},\;180^{\circ})$.

• International journal of advanced smart convergence
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• v.11 no.4
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• pp.96-103
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• 2022

This paper presents the analysis of increasing the resolution of True-Time-Delay (TTD) by 0.5-bit for phased-array antenna system which is one of the Multiple-Input and Multiple Output (MIMO) technologies. For the analysis, a 5.5-bit True-Time Delay (TTD) integrated circuit is designed and analyzed in terms of beam steering performance. In order to increase the number of effective bits, the designed 5.5-bit TTD uses Single Pole Triple Throw (SP3T) and Double Pole Triple Throw (DP3T) switches, and this method can minimize the circuit area by inserting the minimum time delay of 0.5-bit. Furthermore, the circuit mostly maintains the performance of the circuit with the fully added bits. The idea of adding 0.5-bit is verified by analyzing the relation between the number of bits and array elements. The 5.5-bit TTD is designed using 0.18 ㎛ RF CMOS process and the estimated size of the designed circuit excluding the pad is 0.57×1.53 mm². In contrast to the conventional phase shifter which has distortion of scanning angle known as beam squint phenomenon, the proposed TTD circuit has constant time delays for all states across a wide frequency range of 4 - 20 GHz with minimized power consumption. The minimum time delay is designed to have 1.1 ps and 2.2 ps for the 0.5-bit option and the normal 1-bit option, respectively. A simulation for beam patterns where the 10 phased-array antenna is assumed at 10 GHz confirms that the 0.5-bit concept suppresses the pointing error and the relative power error by up to 1.5 degrees and 80 mW, respectively, compared to the conventional 5-bit TTD circuit.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2005.11a
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• pp.191-196
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• 2005

A low-cost, high-performance 40 Gb/s clock recovery module using a phase-locked loop(PLL) for a 40 Gb/s optical receiver has been designed and implemented. It consists of a clock recovery circuit, a RF mixer and frequency discriminator for phase/frequency detection, a DR-VCO, a phase shifter, and a hold circuit. The recovered 40 GHz clock is synchronized with a stable 10 GHz DR-VCO. The clock stability and jitter characteristics of the implemented PLL-based clock recovery module has shown to significantly improve the performance of the conventional open-loop type clock recovery module with DR filter. The measured peak-to-peak RMS jitter is about 230 fs. When input signal is dropped, the 40 GHz clock is generated continuously by hold circuit. The implemented clock recovery module can be used as a low-cost and high-performance receiver module for 40 Gb/s commercial optical network.

• Journal of Power Electronics
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• v.18 no.4
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• pp.1086-1098
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• 2018

This study presents a new sensorless commutation method for brushless direct current motors to replace Hall sensor signals with virtual Hall signals. The importance of the proposed method lies in the simultaneous elimination of the phase shifter and the low-pass filters, which makes the method simple and cost-effective. The method removes high ripple switching noises from motor terminals, thereby decreasing motor losses. The proposed method utilizes unfiltered line voltages with notches caused by current commutation. Hence, specific sign signals are defined to compensate for the effects of commutation noise. The proposed method is free from phase delay that originates from low-pass filters. The method directly produces virtual Hall signals, and thus, it can be interfaced with low-cost commercial commutation integrated circuits based on Hall sensors. Simulation and experimental results show the effectiveness and validity of the proposed method.

• 전기의세계
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• v.38 no.5
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• pp.43-50
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• 1989

현재까지 진행된 저장링 격자의 기본설계에 따라, 고주파 시스템 특히 Cavity와 고전력 고주파시스템의 기본 요구사항 및 기본구조를 보여주었다. 이외에도 저장링의 고주파시스템은 아주 잘 설계된 정밀 고주파회로의 둣받침을 받아야 하는데 이에 대한 설계는 아직 초기단계에 있다. 안정된 500MHz 전원에서부터, Cavity내부 및 외부, 또 Klystron의 출력 등등의 상태를 파악하는 amplitude 및 phase detector들 또한 phase shifter, 신호감쇄기, 튜너 등이 많은 feedback 회로를 통해 서로 연결되어 각종 고, 저전력 시스템을 control하고 Cavity간의 위상을 맞추어 주어야 한다. 또한 이모든 system은 computer control 및 manual control이 가능해야 하고, 고압(-50KV), 고전류(-15A)가 사용되고 또한 Cavity 자체가 전체 저장링의 진공 시스템을 파괴할 수도 있으므로 이에 대한 초고속의 안전 relay 시스템도 설치되어야 한다. 충분한 빔의 수명을 위한 최대전얍은 1.5MV 내지 2.3MV로서 3개 또는 4개의 Cavity가 필요하고, 필요전력은 최소 171KW에서 최대 512KW까지임을 보여주었다. 여러가지 가능한 layout에서 PLS에 적합한 구조를 선택하였으며 기존 가속기들에 사용된 기술수준을 능가하는 특별한 요구사항은 없음을 보여주었다.

• 제어로봇시스템학회:학술대회논문집
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• 2002.10a
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• pp.90.5-90
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• 2002

In this research, we are trying to develop an automatic sorting system, which is mostly affected by frictional forces between a veneer and plank. So we will make a suitable dynamic model and mechanism to control the velocity feedback. We will suggest stick-slip motion model which can predict the stability behavior of this system. The control system has a feedback loop, in which the following operations are included. A kind of sensor can get the velocity of the mass to adhesive veneer. The output of result signal should be passed to a filter, then to a phase shifter, which applies an adjustable phase-shift, to a variable-gain amplifier. A shaker will be attached to the mass, which ex...

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.11b
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• pp.42-45
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• 2001

$(Ba_{0.6}Sr_{0.4}Ca_{x})TiO_{3}+yZrO_{2}$ wt% (x=0.10, 0.15, 0.20, y=0.5~3.0) specimens were fabricated by the mixed-oxide method and then the structural and dielectric properties as a function of the composition ratio and $ZrO_2$ contents were studied. All BSCT specimens showed dense and homogeneous structure without the presence of the seconds phase. The Curie temperature and the dielectric constant at room temperature decreased with increasing the Ca/Ba composition ratio and $ZrO_2$ content. The BSCT(50/40/10) specimens showed the excellent tunability property. And the tunability were increased with increasing the contents of $ZrO_2$.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2004.05a
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• pp.110-110
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• 2004

하나 또는 다수개의 압전액츄에이터(piezoelectric actuator)로 구성된 시스템에서 구동 효율을 높이는데 직접적인 영향을 미치는 고정밀과 빠른 응답 특성을 구현(implementation)하기 위하여, 입력전압에 대하여 출력전압이 선형적으로 추종하고 주파수 가변(variable)이 독립적이며 순차적으로 제어가 가능한 위상가변(phase shifting)형 압전액츄에이터 구동장치의 설계가 필요하다. 구동신호론 증폭하고 가변하는 고전압 증폭 구동장치는 압전액츄에이터 구동에 직접 영향을 주게 되므로, 이의 특성인 고주파에서의 위상지연 보상, 높은 회전비(slew rate)로 고전압에서 정현파의 찌그럼짐을 방지, 전압이득의 가변 및 안정화, 입력 및 출력 임피던스의 개선과 주파스 대역폭(band width)의 확장 등은 매우 중요하다.(중략)

• Proceedings of the KIEE Conference
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• 1988.07a
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• pp.422-425
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• 1988

The structure consisting of an E-plane dielectric slab partially filling a rectangular waveguide is examined with attention on those higher order mode propagation characteristics that are relevant to the design of nonreciprocal remanence ferrite phase shifters. The mechanisms for the elimination of $LSE_{11}$, $LSM_{11}$, $LSE_{12}$ modes are introduced. Experimental verification of elimination of higher order mode is shown in the form of insertion loss measurements.