• Proceedings of the IEEK Conference
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• 2003.11a
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• pp.57-60
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• 2003

In this paper, we propose a new excitation enhancement technique to improve the speech quality of low bit rate speech coders. The proposed technique is based on a harmonic model and it is employed only in the decoding process of speech coders without any additional bits. We develop the procedure of harmonic model parameters estimation and harmonic generation. and apply the technique to a current state of the art low bit rate speech coder, ITU-T G.729 Annex D. Also its performance is measured by using the ITU-T P.862 PESQ score and compared to those of the phase dispersion filter and the long-term postfilter applied to the decoded excitation. It is shown that the proposed excitation enhancement technique can improve the quality of decoded speech and provide better quality for male speech than other techniques.

• Speech Sciences
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• v.11 no.2
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• pp.259-269
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• 2004

In this paper, we propose a new excitation enhancement technique to improve the speech quality of low bit-rate code-excited linear prediction (CELP) coders. The proposed technique is based on a harmonic model and it is employed only in the decoding process of speech coders without any additional bits. We develop the procedure of harmonic model parameter estimation and harmonic generation, and apply this technique to a current state-of-the-art low bit rate speech coder, ITU-T G.729 Annex D. Also, its performance is measured by using the ITU-T P.862 PESQ score and compared to those of the phase dispersion filter and the long-term postfilter applied to the decoded excitation. It is shown that the proposed excitation enhancement technique can improve the quality of decoded speech and provide better quality for male speech than other techniques.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.41 no.6
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• pp.579-587
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• 1992

This paper is to study on the step-up DC-DC converter for power system which yields output characteristics of low voltage and high current, such as fuel cell generation system. DC-AC-DC scheme is suggested for high ratio of voltage conversion. Three phase MOSFET-SPWM inverter is adopted for intermediate AC conversion and inverter output frequency is chosen at 400[Hz] in order to reduce the size of magnetic circuit and DC filter. Since control strategy which combines voltage controller with current controller in parallel is used, good output performance is obtained both in steady state and in transient state like load variation, not only in single unit operation but also in parallel operation.

• Proceedings of the KIEE Conference
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• 1993.07a
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• pp.479-482
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• 1993

A fully balanced differential amplifier can achieve high-gain wide-bandwidth characteristics. And also, Offset PSRR, CMRR and Noise performance of that are excellent, but these merits can be achieved only when the architecture holds fully balanced. Commonly, the fully balanced differential amplifier has a common mode feedback(CMFB) circuit in order to maintain the balance. This paper presents improved characteristics of the CMFB circuit and designs the wide-bandwidth CMOS Op-amp. The unity gain bandwidth of this Op-amp is 50MHz with the load capacitor 2pF, and the value of phase margin is $85^{\circ}$.

• Korean Journal of Optics and Photonics
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• v.1 no.2
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• pp.130-134
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• 1990

In this paper, pSDF-based referance image is reahzed. Using BJTC(binary joint transform correlator) as nonlinear correlator, optical pattern recognition for interclass discrimination is performed. Experimental results show that correlation peak intensity of one calss is two times higher than that of the other class, which indicates its superiority in discrimination sensitivity.

• Proceedings of the IEEK Conference
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• 1998.06a
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• pp.149-152
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• 1998

A synchronization is very important element not only wire communication but also wireless communication. A synchronous oscillator(SO) is a network which synchronizes, tracks, filter, amplifies and divides (if necessary) in a single process. The coherent phase synchronous oscillator(CPSO) is created by adding two external loops to the SO. The CPSO ratains all virtues of a SO while providing coherency throughout the tracking range. This paper has applied a clock recovery of GPS signal using CPSO.

• Journal of the Institute of Electronics Engineers of Korea TE
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• v.39 no.3
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• pp.1-7
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• 2002

This paper presents a new PLL clock generator that can improve a jitter noise characteristics and acquisition process by designing a multi-PFD(Phase Frequency Detector) and an adaptive charge pump circuit. The conventional PLL has not only a jitter noise caused from such a demerit of the wide dead zone and duty cycle, but also a long delay interval that makes a high speed operation unable. An advanced multi-structured PFD circuit using the TSPC(True Single Phase Clocking) circuit is proposed, in which it shows an excellent functionalities in terms of the jitter noises by designing its circuit with the exact dead zone and duty cycle. Our new designed adaptive charge pump in the loop filter of a PLL can improve an acquisition characteristic by adaptively increasing of current. The Hspice simulation is done to evaluate the performance of the proposed circuit. Simulation result shows that our PLL has under 0.01ns in the dead zone, no influence from the duty cycle of input signals and under 50ns in the acquisition time. This circuit will be able to be used in develops of high-performance microprocessors and digital systems.  

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.17 no.6
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• pp.105-112
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• 2003

Diode rectifier which can't be controlled output voltage and phase control converter as AC/DC converter have low power factor and harmonics of lower order in the line current. In this paper, three phase PWM(Pulse Width Modulation) AC/DC boost converter is studied to solve these problems. The characteristics of a proposed converter are to control the phase of current without current sensor as a very simple control algorithm using circuit parameters only and to apply sinusoidal PWM method with fixed switching frequency due to a difficult design of input filter and switching device. We simulate for the proposed algorithm that high power factor is achieved and DC link voltage has fast dynamic response without ripple in rectifying and regenerating operation. As a result of experiment with circuit parameter(inductor, capacitor) decided in simulation, the proposed converter had high power factor and reduction of low order harmonics as against diode rectifier.

• Journal of Communications and Networks
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• v.13 no.2
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• pp.187-200
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• 2011

We present the design and implementation of a novel anti-malware system called SplitScreen. SplitScreen performs an additional screening step prior to the signature matching phase found in existing approaches. The screening step filters out most non-infected files (90%) and also identifiesmalware signatures that are not of interest (99%). The screening step significantly improves end-to-end performance because safe files are quickly identified and are not processed further, and malware files can subsequently be scanned using only the signatures that are necessary. Our approach naturally leads to a network-based anti-malware solution in which clients only receive signatures they needed, not every malware signature ever created as with current approaches. We have implemented SplitScreen as an extension to ClamAV, the most popular open source anti-malware software. For the current number of signatures, our implementation is $2{\times}$ faster and requires $2{\times}$ less memory than the original ClamAV. These gaps widen as the number of signatures grows.

• FOCUS: LIFE SCIENCE
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• no.1
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• pp.5.1-5.3
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• 2024

The document discusses the regeneration of Partisil/Partisphere ion-exchange columns in chromatography. It mentions that column efficiency can diminish with use due to the accumulation of sample and/or mobile phase impurities at the head of the column. This can lead to a change in back pressure, lower column efficiency, and sometimes a change in selectivity. The document outlines a procedure that may restore column performance. The document also provides everyday practices to enhance the lifetime of a column. These include using only high-purity HPLC solvents and buffers, using freshly prepared mobile phases and buffers, filtering mobile phases to remove particulates, using appropriate sample clean-up procedures, using a guard column or pre-column filter, and working within the pressure and flow rate limitations of the column. For the regeneration of Partisil/Partisphere SAX, SCX, WAX, and WCX columns, the document suggests passing 20 column volumes of various mobile phases through the column. These include a buffer wash, distilled water, an acid wash, a chelating wash, a methanol wash, and a buffer for separation. The document emphasizes that not all of these wash steps are required for every column clean-up and that some chromatographers require only a combination of certain steps.