• Journal of the Korean Institute of Telematics and Electronics C
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• v.35C no.8
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• pp.52-59
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• 1998

New types of PFD (phase-frequency detector) are proposed with reset time and propagation delay reduced. The perfomrance of our proposed PFDs are confirmed by SPICE simulation with 0.8.mu.m CMOS process parameter. As a result of simulation, the reset time of PFDs are 0.32 nsec and 0.030 nsec in capture-process. The proposed PFDs can be used in hihg-speed phase-licked loop (PLL).

• Journal of Electrical Engineering and Technology
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• v.12 no.2
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• pp.711-717
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• 2017

This paper proposes an improved sensorless control to estimate the rotor position of an interior permanent magnet synchronous motor. A phase-locked loop (PLL) is used to obtain the phase angle of the grid. The rotor position can be estimated using a PLL based on extended electromotive force (EEMF) because the EEMF contains information about the rotor position. The proposed method can reduce the burden of calculation. Therefore, the control period is decreased. The simulation and experimental results confirm the effectiveness and performance of the proposed method.

• Proceedings of the Korean Institute of Intelligent Systems Conference
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• 2004.04a
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• pp.491-494
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• 2004

Neural Oscillator can be applied to oscillatory systems such as the image recognition, the voice recognition, estimate of the weather fluctuation and analysis of geological fluctuation etc in nature and principally, it is used often to pattern recoglition of image information. Conventional BPL(Back-Propagation Learning) and MLNN(Multi Layer Neural Network) are not proper for oscillatory systems because these algorithm complicate Learning structure, have tedious procedures and sluggish convergence problem. However, these problems can be easily solved by using a synchrony characteristic of neural oscillator with PLL(phase-Locked Loop) function and by using a simple Hebbian learning rule. And also, Recognition velocity of Korean Character can be improved by using a Neural Oscillator's learning accelerator factor η$\_$ij/

• Journal of IKEEE
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• v.4 no.2 s.7
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• pp.266-273
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• 2000

A frequency model of an OCXO (Oven Controlled X-tal Oscillator) is suggested to implement a holdover algorithm in a DP-PLL (Digital Processing-Phase Locked Loop) system. This model is presented simply with second order polynomials with respect to temperature and aging of the OCXO. The model parameters are obtained from experimental data by applying the LSM (Least Squared Method). A holdover algorithm is also suggest using the frequency model. The obtained model is verified to simulate the holdover algorithm with experimental phase data due to variation of temperature.

• Proceedings of the KSME Conference
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• 2008.11a
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• pp.1613-1616
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• 2008

A Transcutaneous Energy Transmission System (TET) has been developed for the wireless energy transmission with two magnetically coupled coils. A resonance circuit is used to raise the induced voltage and current of the secondary coil. Its resonance frequency depends on the internal resistance of circuit and the transferred energy. Because the transferred energy usually changes in wide range, the output voltage is unstable and the energy transferring efficiency decrease. A push-pull class E amplifier is usedto generate high frequency AC voltage. To maintain proper resonance frequency, the voltage output of the amplifier was continuously monitored and adjusted to the optimized resonance frequency. Because of its high frequency (370 kHz), a phase lockedloop circuit and a comparator are used to monitor the output waveform. The results of experimentaldata show that the PLL circuit can increase the transmission efficiency and stabilize the output voltage of TET.

• Proceedings of the KSR Conference
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• 2000.05a
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• pp.368-375
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• 2000

For safety reason ATS(Automatic Train Stop) system is being used, which is a kind of communication system with a feedback amplifier and a transformer on the train and wayside coils. The coils are highly resonant LC circuits, also have very high Q(Quality) factors. The Q factors of wayside ATS coils are to be maintained high enough for the amplifier to operate reliably. In this paper a novel Q measurement system is proposed. The system measures the resonant frequency and the bandwidth of the ATS coils, by controlling the phase difference between the transformer and the coil using digital PLL(Phase Locked Loop). The overall configuration and algorithms of the proposed system and the digital PLL control schemes are presented in details. The experimental waveforms are shown to verify the system performances.

• Proceedings of the KIEE Conference
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• 1995.07a
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• pp.397-399
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• 1995

An UPS must be synchronized in frequency and phase relationship with the mains power supply. This paper describes and tests a digital phase-locked loop(DPLL) circuit of the open-loop method designed by full software with TMS320c31 digital signal processor. finally, the performance of the proposed DPLL is shown and discussed through simulation and experiment.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.12
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• pp.33-39
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• 2013

There have been studies in improving jitter characteristic of delay locked loop (DLL) even it has a shorter jitter that of phase locked loop (PLL). These studies result in numerous architectures of DLL which improve jitter performance. The paper shows that the jitter characteristic can be improved with various loop filters in DLL. It has been designed with 1.8V $0.18{\mu}m$ CMOS process.

• International Journal of Ocean System Engineering
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• v.1 no.4
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• pp.205-210
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• 2011

High data-rate underwater communications is demanded. This demand imposes stringent requirements on underwater communication equipment of phase-locked-loop (PLL). Phase noise in PLL is unwanted and unavoidable. In this paper, we investigate the PLL phase noise effect on high order QAM for underwater communication systems. The phase noise model using power spectral density is adopted for performance evaluation. The phase noise components considered in PLL are reference oscillator, voltage controlled oscillator (VCO), filter and divider. The filters in PLL noise are assumed to be second order active and passive low pass filters. Through simulation, we analyze the phase noise characteristics of the four components and then investigate the performance improvement factor of each component. Consequently, we derive specifications of VCO, phase detector, divider to meet performance requirement of high data-rate communication using QAM under phase noise influence.

• The Transactions of the Korean Institute of Power Electronics
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• v.14 no.2
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• pp.134-141
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• 2009

The new method is proposed to improve the dynamics of the phase angle detector during abrupt voltage dip caused by a grid fault. Usually, LPF(low pass filter) is used in the feedback loop of SRF(Synchronous Reference Frame) - PLL (Phase Locked Loop) system because the measured grid voltage contains harmonic distortions and sensor noises. A better transient response can be obtained with the proposed design method for SRF-PLL by the analysis of linearized model of the PLL system including LPF. Furthermore, in the proposed method, the controller gain and LPF cut-off frequency are changed from normal value to transient value when the voltage disturbance is detected. This paper shows the feasibility and the usefulness of the proposed methods through the computer simulation and the experiment.