고속 위상 동기 루프를 위한 새로운 구조의 위상/주파수 검출기

New phase/frequency detectors for high-speed phase-locked loop application

New types of PFD (phase-frequency detector) are proposed with reset time and propagation delay reduced. The perfomrance of our proposed PFDs are confirmed by SPICE simulation with 0.8.mu.m CMOS process parameter. As a result of simulation, the reset time of PFDs are 0.32 nsec and 0.030 nsec in capture-process. The proposed PFDs can be used in hihg-speed phase-licked loop (PLL).