• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.06a
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• pp.70-71
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• 2007

Analyzing pentacene field effect transistors (FETs) with Au source and drain electrodes as Maxwell-Wagner effect elements, electron and hole injection from the Au electrodes into the FET channel were examined using current-voltage (I-V), capacitance-voltage (C-V) and optical second harmonic generation (SHG) measurements. Based on these results, a mechanism of the hole and electron injection into pentacene from the Au electrodes and subsequently recombination mechanism with light-emitting in the pentacene layer are discussed, with taking into account the presence of trapped charges.

• 한국정보디스플레이학회:학술대회논문집
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• 2000.01a
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• pp.215-216
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• 2000

We fabricated the thin-film transistors using organic semiconductor, pentacene, on $SiN_x$, gate insulator. X-ray diffraction experiments were performed for the sample after heat-treatments at higher temperatures. We confirmed that we obtained "thin-film phase" from the condition used here. From the electrical measurements, we also confirmed that no charges are accumulated at the interface between organic and insulating layer, and FET characteristics of the organic FET using pentacene was discussed.

• Transactions on Electrical and Electronic Materials
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• v.9 no.4
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• pp.151-155
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• 2008

Using pentacene field effect transistors (FETs) with Au source and drain electrodes, electron injection from the Au electrodes into the pentacene was investigated. The capacitance-voltage (C-V) and optical second harmonic generation (SHG) measurements were employed. Electron injection from the Au electrodes was suggested by the hysteresis behavior with the C-V characteristics and slowly decaying SHG signal under DC biasing, A mechanism of hole-injection assisted by trapped electrons is proposed. To confirm electron injection process, light-emitting behavior under the application of AC applied voltage was observed.

• 한국정보디스플레이학회:학술대회논문집
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• 2003.07a
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• pp.675-678
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• 2003

We studied the electrical characteristics of pentacene-based organic field-effect transistors (FETs) with polymethyl methacrylate (PMMA) or poly-4-vinylphenol (PVP) as the gate insulator. PMMA or PVP was spin-coated on the indium tin oxide glass substrate that serves as gate electrodes. The source-drain current dependence on the gate voltage shows the FET characteristics of the hole accumulation type. The transistor with PVP shows a higher field-effect mobility of 0.14 $cm^{2}/Vs$ compared with 0.045 $cm^{2}/Vs$ for the transistor with PMMA. The atomic force microscope (AFM) images indicate that the grain size of the pentacene on PVP is larger than that on PMMA. X-ray diffraction (XRD) patterns for the pentacene deposited on PVP exhibit a new Bragg reflection at $19.5{\pm}0.2^{\circ}$, which is absent for the pentacene on PMMA. This peak corresponds to the flat-lying pentacene molecules with less intermolecular spacing.

• Proceedings of the KIEE Conference
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• 2008.07a
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• pp.1277-1278
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• 2008

Pentacene 박막 트랜지스터의 소스/드레인 전극을 폴리머인 Poly(3,4-ethylene dioxythiophene) poly(styrenesulfonate) (PEDOT:PSS)를 사용하여 잉크젯 프린팅 방법으로 제작하였다. 펜타신 박막 트랜지스터는 열 증착법을 사용하여 폴리며 기판위에 100nm의 두께로 증착하였다. 게이트 절연막은 $SiO_2$ 위에 Polymethly Methacrylate (PMMA)를 증착시킨 double layer를 사용하였다. PMMA 위에 증착시킨 pentacene 결정립이 $SiO_2$ 위에 증착한 pentacene 결정립 보다 크게 성장하였고, double layer의 절연막을 씀으로 인해 게이트 누설 전류가 감소함을 보였다. Pentacene 증착 온도에 따른 결정립 크기를 비교하여 가장 적절한 온도를 찾았다. 프린팅 방법을 사용하여 만든 박막 트랜지스터는 전계효과 이동도가 ${\mu}_{FET}=0.023cm^2/Vs$ 이고, 문턱이전 기울기 S.S=0.49V/dec, 문턱전압 $V_{th}=-18V$, $I_{on}/I_{off}$ 전류비 >$10^3$의 전기적 특성을 보였다.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.22 no.12
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• pp.1009-1013
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• 2009

In this study, we have been synthesized the dielectric layer using pure organic and organic-inorganic hybrid precursor on flexible substrate for improving of the organic thin film transistors (OTFTs) and, design and fabrication of organic thin-film transistors (OTFTs) using small-molecule organic semiconductors with pentacene as the active layer with record device performance. In this work OTFT test structures fabricated on polymerized substrates were utilized to provide a convenient substrate, gate contact, and gate insulator for the processing and characterization of organic materials and their transistors. By an adhesion development between gate metal and PI substrate, a PI film was treated using $O_2$ and $N_2$ gas. The best peel strength of PI film is 109.07 gf/mm. Also, we have studied the electric characteristics of pentacene field-effect transistors with the polymer gate-dielectrics such as cyclohexane and hybrid (cyclohexane+TEOS). The transistors with cyclohexane gate-dielectric has higher field-effect mobility, $\mu_{FET}=0.84\;cm^2/v_s$, and smaller threshold voltage, $V_T=-6.8\;V$, compared with the transistor with hybrid gate-dielectric.

• Proceedings of the KIEE Conference
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• 2009.07a
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• pp.1336_1337
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• 2009

본 논문에서는 유기 박막 트랜지스터의 전극을 잉크젯 프린팅과 스크린 프린팅 방법을 이용하여 유기 박막 트랜지스터를 제작하였다. 전극으로 PEDOT:PSS와 Ag 잉크를 사용하였고, 게이트 절연막으로 polymethyl methacrylate (PMMA)와 poly(4-vinylphenol) (PVP)를 사용하였다. 유기물 활성층으로 pentacene을 진공 증착하였다. 잉크젯 프린팅 방법을 이용하여 제작한 유기 박막 트랜지스터는 전계이동도 (${\mu}_{FET}$) $0.068\;cm^2$/Vs, 문턱전압 ($V_{th}$) -15 V, 전류 점멸비 ($I_{on}/I_{off}$ current ratio) >$10^4$의 전기적 특성을 보였고, 스크린 인쇄 방법을 이용하여 제작한 유기 박막 트랜지스터는 전계이동도 (${\mu}_{FET}$) $0.016\;cm^2$/Vs, 문턱전압 ($V_{th}$) 6 V, 전류 점멸비 ($I_{on}/I_{off}$ current ratio) >$10^4$의 전기적 특성을 보였다. 이를 통하여 프린팅 방법을 이용한 유기 박막 트랜지스터 단일 소자 및 유기 전자 회로 제작의 가능성을 확인 하였다.

• Proceedings of the KIEE Conference
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• 2007.07a
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• pp.1345-1346
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• 2007

다양한 게이트 절연막의 펜타신 박막 트랜지스터의 전기적 특성을 atomic force microscope (AFM), X-선 회절을 사용하여 분석하였다. 펜타신 박막 트랜지스터는 thermal evaporator 방법을 사용하여 여러 폴리며 기판위에 제작하였다. Hexamethylsilasane (HMDS), polyvinyl acetate (PVA), polymethyl methacrylate (PMMA)등의 폴리머 기판을 사용하여 다양한 온도에서 증착시켰다. 이 때 PMMA위에 증착시킨 펜타신의 경우가 가장 큰 그레인 크기를 보였고, 가장 적은 트랩 농도를 보였다. 그리고 상부 전극 구조를 가진 박막 트랜지스터를 HMDS 처리를 한 $SiO_2$와 PMMA 절연막을 사용하여 제작하고 비교하였다. 이때 PMMA기판 위에 제작한 트랜지스터는 전계효과 이동도가 ${\mu}_{FET}=0.03cm^{2}/Vs$ 이고, 문턱이전 기울기 0.55V/dec, 문턱전압 $V_{th}=-6V$, on/off 전류비 $>10^5$의 전기적 특성을 보였고, $SiO_2$ 기판위에 제작한 트랜지스터는 전계효과 이동도 ${\mu}_{FET}=0.004cm^{2}/Vs$, 문턱이전 기울기 0.518 V/dec, 문턱전압 $V_{th}=5V$, on/off 전류비 $>10^4$의 전기적 특성을 보였다.