• 한국안광학회지
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• 제4권1호
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• pp.63-68
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• 1999

공간주파수에 따른 contrast sensitivity를 측정할 수 있는 새로운 방법으로 차트를 제작하기 위해 차트 화면 최대 luminance값을 100%로 하여, 격자주파수의 mean luminance를 25, 50, 75%의 3개형태로 만들어 CS값 0 에서 $10^3$ 값이 되도록 하였다. 초등학생 5학년을 대상으로 공간주파수에 따른 CS값의 측정결과 평균 luminance 값이 떨어질수록 CS값은 감소되고, peak 위치도 low spatial frequency 쪽으로 이동하였다. 약시인 사람은 고주파수쪽에서 CS가 감소하거나, 전체주파수 공간에서 CS값이 감소하였다. 격자순응에 의해 CS 측정값은 순응된 공간주파수의 주변 영역에서 CS가 감소된다.

• Nuclear Engineering and Technology
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• 제30권1호
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• pp.8-16
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• 1998

In this work a method to detect the vibrational peak and to decide the vibrational mode of detected peak for core internal vibration monitoring system which is particularly concerned on the core support barrel (CSB) and fuel assemblies is developed. Flow induced vibration and aging process in the reactor internals cause unsoundness of the internal structure. In order to monitor the vibrational status of core internal, signals from the ex-core neutron detectors are transformed into frequency domain. By analyzing transformed frequency domain signal, an analyst can acquire the information on the vibrational characteristics of the structures, i.e., vibration frequencies of each component, vibrational level, modes of vibration, and the causes of the abnormal vibration, if any. This study is focused on the development of the automated monitoring system. Several methods are surveyed to define the peaks in power spectrum and fuzzy theory is used to automatic detection of the vibrational peaks. Fuzzy algorithm is adopted to define the modes of vibration using the peak values from fuzzy peak recognition, phase spectrum, and coherence spectrum.

• 전기학회논문지
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• 제59권7호
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• pp.1214-1220
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• 2010

This paper proposes an efficient under frequency relay load shedding scheme for the korea power system which is more than two times than the system size and its capacity of the power system 10 years ago. The proposed method is keeping the power system stability and supports for the operating system during critical situations such as big disturbances and unstable in supply and demand. In order to determine the number of load shedding steps, the load to be shed per step, and frequency level, it is necessary to investigate and analyze maximum losses of generation due to the biggest contingency, maximum system overload, maximum keeping frequency, maximum load to be shed, and recovery frequency. The proposed method is applied to Off-peak load(25,400MW) and Peak load(62,290MW) of Korea Electric Power Corporation to demonstrate its effectiveness.

• 한국정보통신학회논문지
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• 제17권10호
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• pp.2409-2418
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• 2013

본 논문에서는 on-chip oscilloscope의 sub-sampler를 위한 클록을 생성하기 위한 두 가지 방식의 주파수 합성기를 제안한다. 제안하는 두 가지의 주파수 합성기는 지연고정루프 기반의 위상 선택기를 이용한 구조와 분수 분주형 위상고정루프를 이용하는 구조를 가지며 시뮬레이션 결과를 비교함으로써 각 구조의 특성이 분석된다. 제안된 두 회로 모두 1V 공급전압을 이용하는 65-nm CMOS 공정에서 설계되었으며, 125 MHz의 주파수를 가지는 입력 클록에 대해 121.15 MHz의 주파수를 가지는 출력 클록을 생성한다. 지연고정루프 기반의 위상 선택기를 이용한 주파수 합성기는 0.167 $mm^2$의 면적을 가지며 출력 클록은 2.88 ps의 지터 특성을 나타나며, 4.75 mW의 전력을 소모한다. 분수 분주형 위상고정루프를 이용한 주파수 합성기는 0.662 $mm^2$의 면적을 가지며 7.2 ps의 지터 특성을 나타내며, 1.16 mW의 전력을 소모한다.

• 한국정보통신학회:학술대회논문집
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• 한국정보통신학회 2012년도 춘계학술대회
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• pp.95-98
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• 2012

본 논문은 40 MHz에서 280 MHz 동작 주파수에서 32-phase clock을 출력하는 multiphase delay-locked loop (DLL)을 제안한다. 제안된 multiphase DLL은 고해상도의 1-bit delay를 위하여 matrix구조의 delay line을 사용한다. Delay line의 선형성을 향상시키기 위하여 matrix 입력단의 비선형성을 보정할 수 있는 기법이 사용된다. 설계된 multiphase DLL은 1.2 V supply를 이용하는 0.11-${\mu}m$ CMOS 공정에서 제작되었다. 125 MHz 동작 주파수에서 multiphase DLL의 DNL은 +0.51/-0.12 LSB 이하로 측정되었으며, input clock의 jitter가 peak-to-peak jitter가 12.9ps일 때 출력clock의 peak-to-peak jitter는 30 ps이다. 면적과 전력 소모는 각각 $480{\times}550{\mu}m^2$과 1.2 V 공급전압에서 9.6 mW이다.

• 대한기계학회논문집
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• 제6권4호
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• pp.346-352
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• 1982

The vibration characteristics of hyoid gears are experimentally investigated with backlash and tooth mesh frequency varied. Experiments are performed with two types of gear sets; well-machined and over-lapped gears. Through the experimental works, a constant torque 0.8kg.m is applied to th gears and a pulse type of trigger signal synchronizing tooth contact is used to measure the tooth mesh frequency and to average the gear vibration signal in the time domain. The time averaged vibration signals are frequency analyzed by a digital signal analyzer. The experimental results show the vibration characteristics of the two different types of gears in relation to backlash amount and mesh frequency variations are well differentiated by harmonic amplitudes and their ratios, and peak-to-peak amplitude of the gear vibration.

• 한국경영과학회:학술대회논문집
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• 대한산업공학회/한국경영과학회 1994년도 춘계공동학술대회논문집; 창원대학교; 08월 09일 Apr. 1994
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• pp.394-398
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• 1994

The aim of the present study was to determine the influence of vibration frequency and muscle contraction level at constant vibration displacement amplitudes on a commonly observed motor response elicited by local vibratory stimulation, i.e., the Tonic Vibration Reflex (TVR). Vibration was applied to the distal tendons of the hand flexor muscles. Changes in activity of the hand flexor and extensor muscles were analyzed as a function of the vibration frequency (40-200 Hz), displacement amplitude(200.mu.m and 300.mu.m peak-to-peak), and the initial contraction level of the flexor muscles (0%, 10%, and 20% of the maximal voluntary contraction: MVC). The main results indicate that the TVR increases with vibration frequency up to 100-150 Hz and decreases beyond, and the TVR attains its maximum at 10% MVC. It appears that high frequency vibration tends to induce less muscle/tendon stress. Such a result is of particular importance for the design of handheld vibrating tools.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2006년도 6th International Meeting on Information Display
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• pp.925-928
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• 2006

With the high sustain frequency at 250 kHz, a three-dimensional diagnostics of excited xenon atoms was investigated by the emission and absorption microscopic spectroscopy for plasma display panels, spatiotemporally. As a typical feature of the emissions, a broad discharge peak was observed on the temporal cathode and a sharp one was monitored on the anode, at the high frequency. However, the discharge starts from the cathode edge, actually, that is a discharge space on the floated address (or data) electrode. Spatially, the dense emission and absorption peak were observed in the discharge space between the sustain electrodes gap. Overall, the microdischarge at high sustain frequency showed priming dominant characteristics.

• JSTS:Journal of Semiconductor Technology and Science
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• 제13권5호
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• pp.459-464
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• 2013

A reset-free anti-harmonic programmable multiplying delay-locked loop (MDLL) that provides flexible integer clock multiplication for high performance clocking applications is presented. The proposed MDLL removes harmonic locking problems by utilizing a simple harmonic lock detector and control logic, which allows this MDLL to change the input clock frequency and multiplication factor during operation without the use of start-up circuitry and external reset. A programmable voltage controlled delay line (VCDL) is utilized to achieve a wide operating frequency range from 80 MHz to 1.2 GHz with a multiplication factor of 4, 5, 8, 10, 16 and 20. This MDLL achieves a measured peak-to-peak jitter of 20 ps at 1.2 GHz.

• JSTS:Journal of Semiconductor Technology and Science
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• 제7권4호
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• pp.241-246
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• 2007

This paper presents two novel compensation circuits for leakage current and power supply noise (PSN) in phase locked loop (PLL) using a nanometer CMOS technology. The leakage compensation circuit reduces the leakage current of the charge pump circuit and the PSN compensation circuit decreases the effect of power supply variation on the output frequency of VCO. The PLL design is based on a 32nm predictive CMOS technology and uses a 0.9 V power supply voltage. The simulation results show that the proposed PLL achieves 88% jitter reduction at 440 MHz output frequency compared to the PLL without leakage compensator and its output frequency drift is little to 20% power supply voltage variations. The PLL has an output frequency range of 40 $M{\sim}725$ MHz with a multiplication range of 1-1023, and the RMS and peak-to-peak jitter are 5psec and 42.7 psec, respectively.