• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2003년도 하계종합학술대회 논문집 I
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• pp.65-68
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• 2003

3GPP's RLC protocol specification adopted an error control scheme based on selective repeat ARQ. In 3GPP ARQ, distinctive windows are provide at transmitting and receiving stations so that those stations are prohibited to send or receive data PDU's out of window. An increase in window size enhances delay performance. Such an increase, however, raises the occupancy at reordering buffer, which results in a long reordering time. Aiming at suppressing the occupancy at reordering buffer, we propose a occupancy control scheme in this paper. In this scheme, a threshold is created in the receiving station's window and a data PDU out of the threshold (but within the window) is treated according to go back N ARQ. By the employment of the occupancy control scheme, the occupancy at the reordering buffer is apparently reduced, while the delay performance may be degraded due to the properties of go back N ARQ. We, thus, investigate the peak occupancy and mean delay performance by a simulation method. From numerical examples, we observe a trade-off in both performance measures and conclude that the peak occupancy is effectively reduced by setting a proper threshold under a constraint on mean delay performance.

• JSTS:Journal of Semiconductor Technology and Science
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• 제11권2호
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• pp.73-79
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• 2011

This paper describes a reset-free delay-locked loop (DLL) for a memory controller application, with the aid of a hysteresis coarse lock detector. The coarse lock loop in the proposed DLL adjusts the delay between input and output clock within the pull-in range of the main loop phase detector. In addition, it monitors the main loop's lock status by dividing the input clock and counting its multiphase edges. Moreover, by using hysteresis, it controls the coarse lock range, thus reduces jitter. The proposed DLL neither suffers from harmonic lock and stuck problems nor needs an external reset or start-up signal. In a 0.13-${\mu}m$ CMOS process, post-layout simulation demonstrates that, even with a switching supply noise, the peak-to-peak jitter is less than 30 ps over the operating range of 500-1200 MHz. It occupies 0.04 $mm^2$ and dissipates 16.6 mW at 1.2 GHz.

• 한국군사과학기술학회지
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• 제14권1호
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• pp.154-159
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• 2011

The effect of the ignition delay time gap is newly studied. The operational characteristics of the linked two pyrotechnic thrusters are affected by the time gap. Although two thrusters are simultaneously ignited, the time at which the pressure starts to rise in each thruster may not be synchronized. The characteristic of the system with the time gap is compared with that of the fully synchronized system without any time gap. Depending upon the magnitude of the time gap, the pressure-time profile and the ballistic performance are different. When two pyrotechnic thrusters have a time gap, the peak pressure of one thruster(in which the pressure is built up earlier) is increased and the other is decreased. As the time gap is increased, the peak pressure is converged into the maximum pressure. This maximum pressure can be obtained when only one thruster is activated. Because the maximum pressure is bounded, it is predicted that there isn't any catastrophic failures in the considered system. When the time gap is relatively small, the impulse of the combined force acting on the moving body is almost maintained. But the ballistic performance of the system with a large time gap should be carefully estimated because the reduction of the ballistic performance should not be easily neglected.

• JSTS:Journal of Semiconductor Technology and Science
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• 제6권4호
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• pp.264-269
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• 2006

A $0.12GHz{\sim}1.4GHz$ DLL-based clock generator with the capability of multiplied four phase clock generation was designed using a 0.18um CMOS process. An adaptive bandwidth DLL with a regulated supply delay line was used for a multiphase clock generation and a low jitter. An extra phase detector (PD) in a reference DLL solves the problem of the initial VCDL delay and achieves a fast lock time. Twice multiplied four phase clocks were generated at the outputs of four edge combiners, where the timing alignment was achieved using a coarse lock signal and the 10 multiphase clocks with T/8 time difference. Those four clocks were combined one more time using a static XOR circuit. Therefore the four times multiplication was achieved. With a 1.8V supply, the rms jitter of 2.1ps and the peak-to-peak jitter of 14.4ps were measured at 1.25GHz output. The operating range is $0.12GHz{\sim}1.4GHz$. It consumes 57mW and occupies 450*325um2 of die area.

• Journal of Computing Science and Engineering
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• 제6권4호
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• pp.257-266
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• 2012

This paper overviews clock design problems related to the circuit reliability in deep submicron design technology. The topics include the clock polarity assignment problem for reducing peak power/ground noise, clock mesh network design problem for tolerating clock delay variation, electromagnetic interference aware clock optimization problem, adjustable delay buffer allocation and assignment problem to support multiple voltage mode designs, and the state encoding problem for reducing peak current in sequential elements. The last topic belongs to finite state machine (FSM) design and is not directly related to the clock design, but it can be viewed that reducing noise at the sequential elements driven by clock signal is contained in the spectrum of reliable circuit design from the clock source down to sequential elements.

• JSTS:Journal of Semiconductor Technology and Science
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• 제13권5호
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• pp.459-464
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• 2013

A reset-free anti-harmonic programmable multiplying delay-locked loop (MDLL) that provides flexible integer clock multiplication for high performance clocking applications is presented. The proposed MDLL removes harmonic locking problems by utilizing a simple harmonic lock detector and control logic, which allows this MDLL to change the input clock frequency and multiplication factor during operation without the use of start-up circuitry and external reset. A programmable voltage controlled delay line (VCDL) is utilized to achieve a wide operating frequency range from 80 MHz to 1.2 GHz with a multiplication factor of 4, 5, 8, 10, 16 and 20. This MDLL achieves a measured peak-to-peak jitter of 20 ps at 1.2 GHz.

• 한국항만학회지
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• 제13권1호
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• pp.113-122
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• 1999

Congestion and traffic accidents occur on the merge and diverge sections in the interchange of the freeway. Studies have been conducted to reduce the traffic delay and accidents on the merge section in the freeway since 1960s. but a study was not conducted to estimate the speed variation on the merge section construct models estimated for the speed variation and suggest the appropriate measures. The purpose of this study was to identify the traffic flow characteristics on the merge section in the freeway construct the models estimated for the speed variation on the merge section in the freeway and finally establish the appropriate measure for reduction of traffic delay and accidents on the merge section in the freeway. The following results were obtained: I) Speed variations in the urban freeway appeared to be about 3.2mph, 6.5mph and 7.4mph based on the morning peak period, afternoon peak period and 24-hours period but those in the suburban freeway appeared to be about 8.0mph, 11.1mph and 10.1mph based on the same periods respectively. So different speed reduction signs need be installed to reduce delay and accidents on the merge section in the freeway based on the areas and periods as the freeway traffic management system(FTMS). ii) These models estimated for speed variation need to be studied with the changeable message sign(CMS) technique based on the real-time data so that the traffic flow could be maximized and the traffic delay and accidents be on the merge section in the freeway as more efficient freeway traffic management system(FTMS) in the near future.

• 화약ㆍ발파
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• 제8권1호
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• pp.3-16
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• 1990

The cautious blasting works had been used with emulsion explosion electric M/S delay caps. Drill depth was from 3m to 6m with Crawler Drill $\varphi{70mm}$ on the calcalious sand stone(sort-moderate-semi hard Rock). The total numbers of feet blast were 88. Scale distance were induces 15.52-60.32. It was applied to propagation Law in blasting vibration as follows. Propagtion Law in Blasting Vibration $V=K(\frac{D}{W^b})^n$ where V : Peak partical velocity(cm/sec) D : Distance between explosion and recording sites (m) W : Maximum Charge per delay-period of eighit milliseconds or more(Kg) K : Ground transmission constant, empirically determind on th Rocks, Explosive and drilling pattern ets. b : Charge exponents n : Reduced exponents Where the quantity $D/W^b$ is known as the Scale distance. Above equation is worked by the U.S Bureau of Mines to determine peak particle velocity. The propagation Law can be catagrorized in three graups. Cabic root Scaling charge per delay Square root Scaling of charge per delay Site-specific Scaling of charge per delay Charge and reduction exponents carried out by multiple regressional analysis. It's divided into under loom and over loom distance because the frequency is verified by the distance from blast site. Empirical equation of cautious blasting vibration is as follows. Over 30m----under l00m----- $V=41(D/3\sqrt{W})^{-1.41}$ -----A Over l00m-----$V= 121(D/3\sqrt{W})^{-1.66}$-----B K value on the above equation has to be more specified for furthur understang about the effect of explosives, Rock strength. And Drilling pattern on the vibration levels, it is necessary to carry out more tests.

• 기술사
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• 제24권6호
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• pp.97-105
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• 1991

The cautious blasting works had been used with emulsion explosion electric M/S delay caps. Drill depth was from 3m to 6m with Crawler Drill ø70mm on the calcalious sand stone (soft-moderate-semi hard Rock). The total numbers of fire blast were 88 round. Scale distance were induces 15.52-60.32. It was applied to propagation Law in blasting vibration as follows. Propagation Law in Blasting Vibration (Equation omitted) where V : Peak partical velocity(cm/sec) D : Distance between explosion and recording sites(m) W : Maximum Charge per delay-period of eighit milliseconds o. more(kg) K : Ground transmission constant, empirically determind on the Rocks, Explosive and drilling pattern ets. b : Charge exponents n : Reduced exponents Where the quantity D / W$^n$ is known as the Scale distance. Above equation is worked by the U.S Bureau of Mines to determine peak particle velocity. The propagation Law can be catagrorized in three graups. Cubic root Scaling charge per delay Square root Scaling of charge per delay Site-specific Scaling of charge per delay Charge and reduction exponents carried out by multiple regressional analysis. It's divided into under loom and over 100m distance because the frequency is verified by the distance from blast site. Empirical equation of cautious blasting vibration is as follows. Over 30 ‥‥‥under 100m ‥‥‥V=41(D/$^3$√W)$\^$-1.41/ ‥‥‥A Over 100 ‥‥‥‥under 100m ‥‥‥V=121(D/$^3$√W)$\^$-1.56/ ‥‥‥B K value on the above equation has to be more specified for furthur understang about the effect of explosives, Rock strength. And Drilling pattern on the vibration levels, it is necessary to carry out more tests.

• 화약ㆍ발파
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• 제9권4호
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• pp.3-12
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• 1991

The cautious blasting works had been used with emulsion explosion electric M /S delay caps. Drill depth was from 3m to 6m with Crawler Drill 70mm on the calcalious sand stone (soft-moderate-semi hard Rock) . The total numbers of feet blast were 88. Scale distance were induces 15.52-60.32. It was applied to Propagation Law in blasting vibration as follows .Propagtion Law in Blasting Vibration V=k(D/W/sup b/)/sup n/ where V : Peak partical velocity(cm/sec) D : Distance between explosion and recording sites(m) W ; Maximum Charge per delay -period of eight milliseconds or more(Kg) K : Ground transmission constant, empirically determind on the Rocks, Explosive and drilling pattern ets. b : Charge exponents n : Reduced exponents Where the quantity D/W/sup b/ is known as the Scale distance. Above equation is worked by the U.S Bureau of Mines to determine peak particle velocity. The propagation Law can be catagrorized in three groups. Cabic root Scaling charge per delay Square root Scaling of charge per delay Site-specific Scaling of charge delay Charge and reduction exponents carried out by multiple regressional analysis. It's divided into under loom and over loom distance because the frequency is varified by the distance from blast site. Empirical equation of cautious blasting vibration is as follows. Over 30m--under 100m----V=41(D/ W)/sup -1.41/-----A Over l00m---------V=121(D/ W)/sup -1.56/-----B K value on the above equation has to be more specified for furthur understand about the effect of explosives. Rock strength, And Drilling pattern on the vibration levels, it is necessary to carry out more tests.