• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.13 no.10
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• pp.812-816
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• 2000

It is very important to understand the correlation of between inter dielectric(ILD) CMP process and various facility factors supplied to equipment to equipment system. In this paper, the correlation between the various facility factors supplied to CMP equipment system and ILD-CMP process was studied. To prevent the partial over-polishing(edge hot-spot) generated in the wafer edge area during polishing, we analyze various facilities supplied at supply system. With facility shortage of D.I water(DIW) pressure, we introduced an adding purified $N_2$(P$N_2$)gas in polishing head cleaning station for increasing a cleaning effect. DIW pressure and P$N_2$gas factors were not related with removal rate, but edge hot-spot of patterned wafer had a serious relation. We estimated two factors (DIW pressure and P$N_2$gas) for the improvement of CMP process. Especially, we obtained a uniform planarity in patterned wafer and prohibited more than 90% wafer edge over-polishing. In this study, we acknowledged that facility factors supplied to equipment system played an important role in ILD-CMP process.

• Proceedings of the Korean Vacuum Society Conference
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• 1996.06a
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• pp.99-99
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• 1996

• Proceedings of the Korean Society of Precision Engineering Conference
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• 1997.10a
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• pp.935-938
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• 1997

Recently, the minimum line width shows a tendency to decrease and the multi-level increase in semiconductor. Therefore, a planarization technique is needed and chemical mechanical polishing(CMP) is considered as one of the most suitable process. CMP accomplishes a high polishing performance and a global planarization of high quality. But there are several defects in CMP such as micro-scratches, abrasive contaminations, and non-uniformity of polished wafer edges. Wet etching include of Spin-etching can improve he defects of CMP. It uses abrasive-free chemical solution instead of slurry. On this study, ILD(INterlayer-Dielectric) was removed by CMP and wet-etching methods in order to investigate the superiority of wet etching mechanism. In the thin film wafer, the results were evaluated at a viewpoint of material removal rate(MRR) and within wafer non-uniformity(WIWNU). And pattern step height was also compared for planarization characteristics of the patterned wafer.

• Journal of KIISE:Software and Applications
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• v.37 no.5
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• pp.386-393
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• 2010

A defect in an image is a set of pixels forming an irregular shape. Since a defect, in most cases, is not easy to be modeled mathematically, the defect detection problem still resides in a research area. If a given image, however, composed by certain patterns, a defect can be detected by the fact that a non-defect area should be explained by another patch in terms of a rotation, translation, and noise. In this paper, therefore, the defect detection method for a repeated multi-patterned image is proposed. The proposed defect detection method is composed of three steps. First step is the interest point detection step, second step is the selection step of a appropriate patch size, and the last step is the decision step. The proposed method is illustrated using SEM images of semiconductor wafer samples.

• Transactions on Electrical and Electronic Materials
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• v.2 no.3
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• pp.24-27
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• 2001

The end point of oxide chemical mechanical polishing (CMP) have determined by polishing time calculated from removal rate and target thickness of oxide. This study is about control of oxide removal amounts on the shallow trench isolation (STI) patterned wafers using removal rate and thickness of blanket (non-patterned) wafers. At first, it was investigated the removal properties of PETEOS blanket wafers, and then it was compared with the removal properties and the planarization (step height) as a function of polishing time of the specific STI patterned wafers. We found that there is a relationship between the oxide removal amounts of blanket and patterned wafers. We analyzed this relationship, and the post CMP thickness of patterned wafers could be controlled by removal rate and removal target thickness of blanket wafers. As the result of correlation analysis, we confirmed that there was the strong correlation between patterned and blanket wafer (correlation factor: 0.7109). So, we could confirm the repeatability as applying for STI CMP process from the obtained linear formula. As the result of repeatability test, the differences of calculated polishing time and actual polishing time was about 3.48 seconds. If this time is converted into the thickness, then it is from 104 $\AA$ to 167 $\AA$. It is possible to be ignored because process margin is about 1800 $\AA$.

• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2014.11a
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• pp.104-105
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• 2014

마이크로 패턴된 Au 전극사이에 얼라인된 Tellurium (Te) 나노리본들이 의도한 모양과 배열방식을 가지고 리쏘그래피 패턴 전해증착 (Lithographically patterned nanowier electrodepositon, LPNE) 방법에 의해 4인치 Si wafer 배치로 합성되었다. 합성된 Te 나노리본은 수 센티미터의 길이를 가지고, 그 두께와 폭 역시 작업 전극으로 사용되는 Si wafer위에 증착된 Ni의 두께와 전해증착 시간에 의해 쉽게 제어될 수 있다. $3{\mu}m$의 간격을 갖는 Au 전극 사이에 얼라인된 두께 ~100nm의 Te 나노리본들은 전해증착에 의해 그 폭이 제어되었고, 각각의 다른 폭을 갖는 증착된 하나의 Te 나노리본들의 IV 및 FET 측정을 통하여 나노리본 폭의 변화에 따른 전기적 특성 (비저항, FET 이동도 및 FET 캐리어 농도)이 평가되었다.

• Journal of the Korean Society for Precision Engineering
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• v.19 no.1
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• pp.196-203
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• 2002

Generally, non-uniformity and removal rate are important factors on measurements of both wafer and die scale. In this study, we verify the effects of the pressure and relative velocity on the results of the chemical mechanical polishing and the effect of pattern density on inter layer dielectric chemical mechanical polishing of patterned wafer. We suggest an appropriate modeling equation, transformed from Preston\`s equations which was used in glass polishing, and simulate the removal rate of patterned wafer in chemical mechanical polishing. Results indicate that the pressure and relative velocity are dominant factors for the chemical mechanical polishing and pattern density effects on removal rate of pattern wafers in die scale. The modeling is well agreed to middle and low density structures of the die. Actually, the die used in Fab. was designed to have an appropriate density, therefore the modeling will be suitable for estimating the results of ILD CMP.

• Korean Journal of Metals and Materials
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• v.46 no.6
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• pp.377-381
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• 2008

Prism sheet of LCD BLU which depends on supply from Japan and U.S.A was studied by using Si anisotropic etching and injection molding technologies. First, the prism sheet was patterned on Si wafer through photolithography, and the best conditions of Si etching were determined through etching Si wafer with TMAH to obtain straight optimized zigzag patterns, and a cross pattern to provide light diffusion and concurrent focusing. The etch rate of TMAH was concluded to be constant for $25wt%-70^{\circ}C$ condition. Ni stamp of prism sheet was made by electrodeposition using patterned Si wafer, normal or fast H/C(Heating/Cooling) injections were carried out to fabricate prism sheet. It was known that fast H/C injection could fabricate prism sheet more accurately than normal injection. Zigzag patterns and the cross pattern showed higher transmissivity than the straight patterns because of light diffusion through diagonal direction. The fast H/C injection for zigzag patterns showed lower transmissivity than normal injection because there occurred more light diffusion through precise injection patterns, but the fast H/C injection for straight patterns showed only refraction without diffusion, causing lower transmissivity than normal injection.

• Proceedings of the KOSOMBE Conference
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• v.1998 no.11
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• pp.223-224
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• 1998

RGDF immobilized micro-patterned surface was developed to detect the functional state of platelets. Using photolithographic technology, an RGDF micro-patterned surface was prepared on silicon wafer. Platelet adhesion to this surface was observed by fluorescence microscopy after staining platelets with mepacrine. Nonactivated platelets pretreated with $PGE_1$ interacted incompletely with the RGDF micro-patterned surface, whereas activated platelets treated with ADP interacted with the surface extensively. These results show that the distinct selectivity of an RGDF-immobilized micro-patterned surface can be used to detect the functional state of platelets.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.02a
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• pp.433-433
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• 2012

As the requirement in patterning geometry continuously shrinks down, the termination of etch process at the exact time became crucial for the success in nano patterning technology. By virtue of real-time optical emission spectroscopy (OES), etch end point detection (EPD) technique continuously develops; however, it also faced with difficulty in low open ratio etching, typically in self aligned contact (SAC) and one cylinder contact (OCS), because of very small amount of optical emission from by-product gas species in the bulk plasma glow discharge. In developing etching process, one may observe that coupon test is being performed. It consumes costs and time for preparing the patterned sample wafers every test in priority, so the coupon wafer test instead of the whole patterned wafer is beneficial for testing and developing etch process condition. We also can observe that etch open area is varied with the number of coupons on a dummy wafer. However, this can be a misleading in OES study. If the coupon wafer test are monitored using OES, we can conjecture the endpoint by experienced method, but considering by data, the materials for residual area by being etched open area are needed to consider. In this research, we compare and analysis the OES data for coupon wafer test results for monitoring about the conditions that the areas except the patterns on the coupon wafers for real-time process monitoring. In this research, we compared two cases, first one is etching the coupon wafers attached on the carrier wafer that is covered by the photoresist, and other case is etching the coupon wafers on the chuck. For comparing the emission intensity, we chose the four chemical species (SiF2, N2, CO, CN), and for comparing the etched profile, measured by scanning electron microscope (SEM). In addition, we adopted the Dynamic Time Warping (DTW) algorithm for analyzing the chose OES data patterns, and analysis the covariance and coefficient for statistical method. After the result, coupon wafers are over-etched for without carrier wafer groups, while with carrier wafer groups are under-etched. And the CN emission intensity has significant difference compare with OES raw data. Based on these results, it necessary to reasonable analysis of the OES data to adopt the pre-data processing and algorithms, and the result will influence the reliability for relation of coupon wafer test and whole wafer test.