• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.24 no.12
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• pp.1148-1157
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• 2013

In a passive UHF RFID system, the impedance matching between tag antenna and chip as well as the protocol parameter settings in a reader plays important role in determination of the maximum read-range. Almost no paper, however, has dealt with the above issues in relation with the maximum read range. In this paper, two known methods (of using the value from data sheets and proprietary RFID tester) and our proposing method in chip impedance evaluation are compared in terms of maximum read range. The read range of tags whose antenna impedance is conjugate matched with the chip impedance obtained from the proposed method is improved maximum 73 % more than that of tags from the other methods.

• Proceedings of the Korea Information Processing Society Conference
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• 2018.10a
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• pp.126-129
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• 2018

기존 자율주행자동차의 영상 센서 시스템이 표지판에 약간의 부착물만 붙어도 인식이 되지 않는 점을 고려해 Semi-Passive RFID(Radio-Frequency Identification)기술을 이용한다. 각 표지판마다 소스코드를 설정한 후 RFID 태그를 부착하고 자동차의 룸미러 뒤쪽 중앙에 RFID 리더기를 부착해 원거리에서 태그와 리더기의 작용을 통해 영상 센서 시스템의 취약점을 보완해 오류를 줄인다. 태그의 건전지를 대체하여 M24LR16E칩을 적용한다. 이 칩은 기존에 낭비되는 전파와 폐열, 움직임에 따라 발생하는 동작 에너지의 미세한 에너지를 모아 메모리칩을 구동한다. 또한 GPS를 이용한 위치정보 획득 및 지리적 변화의 낮은 정확도를 보완해 도시 인프라에 부착된 RFID를 제안하여 이를 이용한 위치정보 획득과 처리방안의 문제점도 해결한다.

• ETRI Journal
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• v.32 no.2
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• pp.327-329
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• 2010

A fully integrated small form-factor HBT power amplifier (PA) was developed for UMTS Tx applications. For practical use, the PA was implemented with a well configured bottom dimension, and a CMOS control IC was added to enable/disable the HBT PA. By using helix-on-pad integrated passive device output matching, a chip-stacking technique in the assembly of the CMOS IC, and embedding of the bulky inductive lines in a multilayer substrate, the module size was greatly reduced to 2 mm ${\times}$ 2.2 mm. A stage-bypass technique was used to enhance the efficiency of the PA. The PA showed a low idle current of about 20 mA and a PAE of about15% at an output power of 16 dBm, while showing good linearity over the entire operating power range.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.57 no.11
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• pp.2127-2130
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• 2008

In this paper, a tunable bandpass filter with mutual inductive coupling circuits is newly designed and demonstrated for UHF TV tuner ranged from Ch.14(473MHz) to Ch.69(803MHz) applications. Conventional HF tuning circuit with an electromagnetic bandpass filter has several problems such as large size, high volume and high cost, since the electromagnetic filter is comprised of several passive components and air core inductors to be assembled and controlled manually. To address these obstacles, peaking chip inductor was newly applied for constructing the mutual inductive coupling circuit. The proposed circuit was newly and optimally designed, since the chip inductor showed lower components Q-value than the air core inductor. A varactor diode has been also used to fabricate the proposed tunable bandpass filter for RF tuning circuit. The fabricated tunable filter exhibited low insertion loss of approximately -3dB, high return loss of below -10dB, and large tuning bandwidth of 330MHz.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2003.09a
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• pp.93-100
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• 2003

The continuing scaling trend in microelectronic circuit technology has a significant impact on the different IC interconnection and packaging technologies. These latter technologies have not kept pace with the IC scaling trends, resulting in a so-called“interconnect technology gap”. Multilayer thin film technology is proposed as a“bridge”- technology between the very high density IC technology and the coarse standard PCB technology. It is also a key enabling technology for the realisation of true“System-in-a-Package”(SIP) solutions, combining multiple“System-on-a-Chip”(SOC) IC's with other components and also integrating passive components in its layers. A further step is to use this technology to realise new functionalities on top of active wafers. These additional“above-IC”processed layers may e.g. be used for low loss, high speed on chip interconnects, clock distribution circuits, efficient power/ground distribution and to realize high Q inductors on chip.

• Journal of the Korea Convergence Society
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• v.9 no.10
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• pp.237-242
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• 2018

A micromixer is a component of a lab-on-a-chip or microfluidic device that mixes two or more chemicals together(convergence). The purpose of this study is to assess the performance of passive micromixer of various shapes. Six shapes of micromixers were compared and three dimensional modeling was carried out to have the same hydraulic diameter. The commercial code, ANSYS Fluent, was used to simulate the internal mixing flow. A numerical analysis method is described in detail in this paper. The performance of the micromixer was compared with the mixing index and pressure drop. Consequently, the CDM-8T shape showed reasonable mixing performance and relatively low pressure drop.

• Journal of Advanced Marine Engineering and Technology
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• v.34 no.6
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• pp.840-845
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• 2010

In this paper, short-wavelength transmission line employing periodically arrayed capacitive devices (PACD) structures were developed for application to a development of miniaturized on-chip passive components on GaAs monolithic microwave integrated circuit (MMIC). The transmission line employing PACD structure showed a wavelength much shorter than conventional microstrip line. Concretely, the wavelength of the transmission line employing PACD structure was 8 % of the conventional microstrip line on GaAs substrate at 5GHz. And It was 38% of the microstrip line employing PPGM at 5GHz. It was recognized that the basic characteristics of the transmission line employing PACD structure were investigated for application to the miniaturized passive on-chip components.

• JSTS:Journal of Semiconductor Technology and Science
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• v.2 no.1
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• pp.30-40
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• 2002

A 2.45GHz double-balanced modified Gilbert-type CMOS up-conversion mixer design is introduced, where the PMOS current-reuse bleeding technique is demonstrated to be efficient in improving conversion gain, linearity, and noise performance. An LO buffer is included in the mixer design to perform single-ended to differential conversion of the LO signal on chip. Simulation results of the design based on careful modeling of all active and passive components are examined to explain in detail about the characteristic improvement and degradation provided by the proposed design. Two kinds of chips were fabricated using a standard $0.35\mu\textrm$ CMOS process, one of which is the mixer chip without the LO buffer and the other is the one with it. The measured characteristics of the fabricated chips are quite excellent in terms of conversion gain, linearity, and noise, and they are in close match to the simulation results, which demonstrates the adequacy of the modeling approach based on the macro models for all the active and passive devices used in the design. Above all the benefits provided by the current-reuse bleeding technique, the improvement in noise performance seems most valuable.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.25 no.9B
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• pp.1635-1640
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• 2000

In this paper, a 18 GHz oscillator is designed with the push-push method an fabricated by semi-MMIC process, in which the second harmonic is the main output signal with the suppressed fundamental mode. In semi-MMIC process, passive components with microstrip transmission line are implemented using MMIC process on semi-insulating GaAs substrate. Then, chip types of P-HEMT, resistors, and capacitors are connected through Au wire-bonding. Also, the ground plane is inserted around the circuit and connected each other with the back-side of substrate through Au wire-bonding instead of via-hole. The semi-MMIC push-push oscillator shows the output powder of -10.5 dBm, the fundamental frequency suppression of -17.3 dBc/Hz, and the phase noise of -97.9 dBc/Hz at the offset frequency of 100 kHz.

• ETRI Journal
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• v.25 no.2
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• pp.65-72
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• 2003

To achieve cost and size reductions, we developed a low cost manufacturing technology for RF substrates and a high performance passive process technology for RF integrated passive devices (IPDs). The fabricated substrate is a conventional 6" Si wafer with a 25${\mu}m$ thick $SiO_2$ surface. This substrate showed a very good insertion loss of 0.03 dB/mm at 4 GHz, including the conductive metal loss, with a 50 ${\Omega}$ coplanar transmission line (W=50${\mu}m$, G=20${\mu}m$). Using benzo cyclo butene (BCB) interlayers and a 10 ${\mu}m$ Cu plating process, we made high Q rectangular and circular spiral inductors on Si that had record maximum quality factors of more than 100. The fabricated inductor library showed a maximum quality factor range of 30-120, depending on geometrical parameters and inductance values of 0.35-35 nH. We also fabricated small RF IPDs on a thick oxide Si substrate for use in handheld phone applications, such as antenna switch modules or front end modules, and high-speed wireless LAN applications. The chip sizes of the wafer-level-packaged RF IPDs and wire-bondable RF IPDs were 1.0-1.5$mm^2$ and 0.8-1.0$mm^2$, respectively. They showed very good insertion loss and RF performances. These substrate and passive process technologies will be widely utilized in hand-held RF modules and systems requiring low cost solutions and strict volumetric efficiencies.