Browse > Article

2.45GHz CMOS Up-conversion Mixer & LO Buffer Design  

Park, Jin-Young (School of Electrical, Electronics, and Computer Engineering, Hongik University)
Lee, Sang-Gug (School of Electrical, Electronics, and Computer Engineering, Hongik University)
Hyun, Seok-Bong (School of Engineering, Information and Communications University)
Park, Kyung-Hwan (ETRI-Microelectronics Technology Laboratory)
Park, Seong-Su (ETRI-Microelectronics Technology Laboratory)
Publication Information
Abstract
A 2.45GHz double-balanced modified Gilbert-type CMOS up-conversion mixer design is introduced, where the PMOS current-reuse bleeding technique is demonstrated to be efficient in improving conversion gain, linearity, and noise performance. An LO buffer is included in the mixer design to perform single-ended to differential conversion of the LO signal on chip. Simulation results of the design based on careful modeling of all active and passive components are examined to explain in detail about the characteristic improvement and degradation provided by the proposed design. Two kinds of chips were fabricated using a standard $0.35\mu\textrm$ CMOS process, one of which is the mixer chip without the LO buffer and the other is the one with it. The measured characteristics of the fabricated chips are quite excellent in terms of conversion gain, linearity, and noise, and they are in close match to the simulation results, which demonstrates the adequacy of the modeling approach based on the macro models for all the active and passive devices used in the design. Above all the benefits provided by the current-reuse bleeding technique, the improvement in noise performance seems most valuable.
Keywords
mixer; CMOS; bleeding; reuse; buffer;
Citations & Related Records
연도 인용수 순위
  • Reference
1 B. Razavi, Design of Analog CMOS Integrated Circuits. New York: McGraw-Hill, 2000
2 J. Bastos, M. Steyaert, B. Graindourze, and W. Sansen, 'Matching of MOS transistors with different layout styles,' in Proc. IEEE International Conf. Microelectronic Test Structures, vol. 9, pp. 17-18, Mar. 1996   DOI
3 K. L. Fong, C. Dennis, and R. G. Meyer, 'A class AB monolithic mixer for 900-MHz applications,' IEEE J. Solid-State Circuits, vol. 32, pp. 1166-1172, Aug. 1997   DOI   ScienceOn
4 A. van der Ziel, Noise in Solid State Devices and Circuits. New York: John Wiley & Sons, 1986
5 P. A. Layman and S. G. Chamberlain, 'A compact thermal noise model for the investigation of soft error rates in MOS VLSI digital circuits,' IEEE J. Solid-State Circuits, vol. 24, pp. 79-89, Feb. 1989   DOI   ScienceOn
6 J. R. Long, 'Monolithic transformers for Silicon RF IC design,' IEEE J. Solid-State Circuits, vol. 35, pp. 1368-1382, Sept. 2000   DOI   ScienceOn
7 S.-G. Lee and J.-K. Choi, 'Current-reuse bleeding mixer,' Electronics Letters, vol. 36, pp. 1-2, Apr. 2000   DOI   ScienceOn
8 T.-P. Liu and E. Westerwick, , '5-GHz CMOS radio transceiver front-end chipset,' IEEE J. Solid-State Circuits, vol. 35, pp. 1927-1933, Dec. 2000   DOI   ScienceOn
9 K. Runge, D. Pehlke, and B. Schiffer, 'On-chip matched 5.2GHz differential integrated mixer with RF and LO preamplification, fabricated in 0.35$\mu{M}$ CMOS technology,' Electronics Letters, vol. 35, pp. 1545-1546, Sept. 1999   DOI   ScienceOn
10 K. L. Fong and R. G. Meyer, 'High-frequency nonlinearity analysis of common-emitter and differential-pair transconductance stages,' IEEE J. Solid-State Circuits, vol. 33, pp. 548-555, Apr. 1998   DOI   ScienceOn
11 L. A. MacEachern and T. Manku, 'A charge-injection method for Gilbert cell biasing,' in Proc. IEEE Canadian Conf., 1998, pp. 365-368   DOI
12 A. N. Karanicolas, , 'A 2.7-V 900-MHz CMOS LNA and Mixer,' IEEE J. Solid-State Circuits, vol. 31, pp. 1939-1944, Dec. 1996   DOI   ScienceOn