• 제목/요약/키워드: passive chip

검색결과 137건 처리시간 0.029초

Si RFIC상의 온칩 수동소자에의 응용을 위한 주기적 접지 금속막 선로를 이용한 단파장 전송선로 개발 (Development of Short-Wavelength Transmission Line Employing Periodically Perforated Ground Metal for Application to Miniaturized On-chip Passive Components on Si RFIC)

  • 조한나;박영배;윤영
    • Journal of Advanced Marine Engineering and Technology
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    • 제32권2호
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    • pp.330-335
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    • 2008
  • In this study, highly miniaturized short-wavelength transmission line employing periodically perforated ground metal (PPGM) structures were developed for application to miniaturized on-chip passive component on Si RFIC. The transmission line employing PPGM structure showed shorter wavelength and lower characteristic impedance than conventional coplanar-type transmission line. The wavelength of the transmission line employing PPGM structure was 57% of the conventional coplanar-type transmission line on Si Radio Frequency Integrated Circuit (RFIC) substrate. Basic characteristics of the transmission line employing PPGM structure were also investigated in order to evaluate its suitability for application to a development of miniaturized passive on-chip components. According to the results, it was found that the PPGM structure is a promising candidate for application to a development of miniaturized on-chip passive components on Si RFIC.

Ultra-Wide-Band (UWB) Band-Pass-Filter for Wireless Applications from Silicon Integrated Passive Device (IPD) Technology

  • Lee, Yong-Taek;Liu, Kai;Frye, Robert;Kim, Hyun-Tai;Kim, Gwang;Aho, Billy
    • 마이크로전자및패키징학회지
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    • 제18권1호
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    • pp.41-47
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    • 2011
  • Currently, there is widespread adoption of silicon-based technologies for the implementation of radio frequency (RF) integrated passive devices (IPDs) because of their low-cost, small footprint and high performance. Also, the need for high speed data transmission and reception coupled with the ever increasing demand for mobility in consumer devices has generated a great interest in low cost devices with smaller form-factors. The UWB BPF makes use of lumped IPD technology on a silicon substrate CSMP (Chip Scale Module Package). In this paper, this filter shows 2.0 dB insertion loss and 15 dB return loss from 7.0 GHz to 9.0 GHz. To the best of our knowledge, the UWB band-pass-filter developed in this paper has the smallest size ($1.4\;mm{\times}1.2\;mm{\times}0.40\;mm$) while achieving equivalent electrical performance.

High Integration Packaging Technology for RF Application

  • Lee, Young-Min
    • 한국마이크로전자및패키징학회:학술대회논문집
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    • 한국마이크로전자및패키징학회 1999년도 1st Korea-Japan Advanced Semiconductor Packaging Technology Seminar
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    • pp.127-154
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    • 1999
  • Interconnect - Wire bonding-> Flip chip interconnect ; At research step, Au stud bump bonding seems to be more proper .Package -Plastic package-> $Z_{0}$ controlled land grid package -Flip Chip will be used for RF ICs and CSP for digital ICs -RF MCM comprised of bare active devices and integrated passive components -Electrical design skills are much more required in RF packaging .Passive Component -discrete-> integrated -Both of size and numbers of passive components must be reduced

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Plastic Base PCB 에서의 Embedded Passive 기술 동향과 개발현황

  • 고영주
    • 한국마이크로전자및패키징학회:학술대회논문집
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    • 한국마이크로전자및패키징학회 2006년도 SMT/PCB 기술세미나
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    • pp.1-14
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    • 2006
  • [ $\blacklozenge$ ] PCB에 있어서 Embedded passive 는chip을 직접 내장하는 방법과 특별한 특성을 갖는 재료 및 공법을 사용하여 chip 응 대치하는 방법이 있다. $\blacklozenge$ Embedded passive PCB가 적용될 수 있는 유력한 적용 분야는 소형화가가 요구되는 분야와 고속 특성이 요구되는 분야를 들 수 있고, 따라서, Module, SOP/SIP, Package substrate 등이 우선적으로 적용될 수 있는 분야다. $\blacklozenge$ Embedded capacitor를 적용한 경우, 일반적인 chip capacitor를 적용한 경우보다 더 좋은 전기적인 특성(SRF, Q)을 얻을 수 있으며, solder joint 등의 영향을 포함하면 더욱 좋은 특성이 얻어질 수 있다. $\blacklozenge$ Embedded passive 의 상용화를 위해서, 공차를 관리하는 방법의 개발과 공차에 대한 합리적인 규격을 설정하는 것이 우선 과제이다. $\blacklozenge$ Embedded resistor 의 경우, Laser trim을 적용하여 ${\pm}\;5\%$ 또는 그 이하의 공차를 실현할 수 있고, $30\;K\Omega/sq$. 의 고저항의 적용까지 가능하다. $\blacklozenge$ 고속 신호에서의 noise 감소, module, SIP/SOP 의 소형화를 실현하는데 Embedded passive(혹은 active)PCB 가 기여 할 수 있을 것이고, 이를 위하여 Set 업체, PCB 업체, 재료 업체간의 지속적인 협조가 필요할 것이다.

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CMOS 공정을 이용한 무선인식 송수신 집적회로의 설계 및 제작 (Design and Implementation of a RFID Transponder Chip using CMOS Process)

  • 신봉조;박근형
    • 한국전기전자재료학회논문지
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    • 제16권10호
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    • pp.881-886
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    • 2003
  • This paper describes the design and implementation of a passive transponder chip for RFID applications. Passive transponders do not have their own power supply, and therefore all power required for the operation of a passive transponder must be drawn from the field of the reader. The designed transponder consists of a full wave rectifier to generate a dc supply voltage, a 128-bit mask ROM to store the information, and Manchester coding and load modulation circuits to be used for transmitting the information from the transponder to the reader. The transponder with a size 410 x 900 ${\mu}$m$^2$ has been fabricated using 0.65 ${\mu}$m 2-poly, 2-metal CMOS process. The measurement results show the data transmission rate of 3.9 kbps at RF frequency 125 kHz.

X-대역 GaN HEMT Bare-Chip 펄스-전압 펄스-RF 수동 로드-풀 측정 (Pulsed-Bias Pulsed-RF Passive Load-Pull Measurement of an X-Band GaN HEMT Bare-chip)

  • 신석우;김형종;최길웅;최진주;임병옥;이복형
    • 한국ITS학회 논문지
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    • 제10권1호
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    • pp.42-48
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    • 2011
  • 본 논문에서는 GaN HEMT (Gallium Nitride High Electron Mobility Transistor) bare-chip을 이용하여 X-대역에서 수동로드 풀(Passive load-pull)을 수행하였다. 열로 인한 특성 변화가 최소화 된 동작 조건을 얻기 위해 드레인 바이어스 전압과 입력 RF 신호를 펄스로 인가하였다. 전자기장 시뮬레이션과 회로 시뮬레이션을 병행하여, 와이어 본딩 효과를 고려하여 드레인 경계면에서의 정확한 임피던스 정합 회로를 구현하였다. 임피던스를 변화시키기 위해 마이크로스트립 라인 스터브의 길이가 조절 가능한 회로를 설계하였다. 펄스 로드 풀 실험 결과 8.5 GHz에서 9.2 GHz 대역에서 최대 42.46 dBm의 출력 전력을 얻었으며, 58.7%의 드레인 효율 특성을 얻었다.

전력 무결성을 위한 온 칩 디커플링 커패시터 (On-chip Decoupling Capacitor for Power Integrity)

  • 조승범;김사라은경
    • 마이크로전자및패키징학회지
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    • 제24권3호
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    • pp.1-6
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    • 2017
  • As the performance and density of IC devices increase, especially the clock frequency increases, power grid network integrity problems become more challenging. To resolve these power integrity problems, the use of passive devices such as resistor, inductor, and capacitor is very important. To manage the power integrity with little noise or ripple, decoupling capacitors are essential in electronic packaging. The decoupling capacitors are classified into voltage regulator capacitor, board capacitor, package capacitor, and on-chip capacitor. For next generation packaging technologies such as 3D packaging or wafer level packaging on-chip MIM decoupling capacitor is the key element for power distribution and delivery management. This paper reviews the use and necessity of on-chip decoupling capacitor.

PCB내 1005 수동소자 내장을 이용한 Diplexer 구현 및 특성 평가 (The Fabrication and Characterization of Diplexer Substrate with buried 1005 Passive Component Chip in PCB)

  • 박세훈;윤제현;유찬세;김필상;강남기;박종철;이우성
    • 마이크로전자및패키징학회지
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    • 제14권2호
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    • pp.41-47
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    • 2007
  • 현재 PCB기판내에 소재나 칩부품을 이용하여 커패시터나 저항을 구현하여 내장시키는 임베디드 패시브기술에 대한 연구가 많이 진행되어 지고 있다. 본 연구에서는 커패시터 용량이나 인덕터의 특성이 검증된 칩부품을 기판내 내장시켜 다이플렉서 기판을 제작하였다. $880\;MHz{\sim}960\;MHz(GSM)$영역과 $1.71\;GHz{\sim}1.88\;GHz(DCS)$영역을 나누는 회로를 구성하기 위해 1005크기의 6개 칩을 표면실장 공정과 함몰공정으로 형성시켜 Network Analyzer로 측정하여 비교하였다. chip표면실장으로 구현된 Diplexer는 GSM에서 최대 0.86 dB의 loss, DCS에서 최대 0.68 dB의 loss가 나타났다. 표면실장과 비교하였을 때 함몰공정의 Diplexer는 GSM 대역에서 약 5 dB의 추가 loss가 나타났으며 목표대역에서 0.6 GHz정도 내려갔다. 칩 전극과 기판의 도금 연결부위는 $260^{\circ}C$, 80분의 고온공정 및 $280^{\circ}C$, 10초의 솔더딥핑의 열충격 고온공정에서도 이상이 없었으며 특성의 변화도 거의 관찰되지 않았다.

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RLSE알고리즘을 이용한 원격 정전용량형 습도 센서 시스템 (Passive Telemetry Capacitive Humidity Sensor System using RLSE Algorithm)

  • Kyung-Yup Kim;Joon-Tark Lee
    • Journal of Advanced Marine Engineering and Technology
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    • 제28권4호
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    • pp.569-576
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    • 2004
  • In this paper, passive telemetry capacitive humidity sensor system using a RLSE(Recursive Least Square Estimation) technique is proposed. To overcome the problem like power limits and complications that general passive telemetry sensor system including IC chip has, the principle of inductive coupling is applied to model the sensor system. Specially. by applying the forgetting factor we show that the accuracy of its estimation can be improved even in the case of time varying parameter and also the convergence time can be reduced.

Si RFIC상에서 주기적 구조를 이용한 코프레너형 전송선로의 기본특성연구 (A Study on Basic Characteristics of a Coplanar-type Transmission Line Employing Periodic Structure on Si RFIC)

  • 조한나;박영배;윤영
    • Journal of Advanced Marine Engineering and Technology
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    • 제32권6호
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    • pp.964-973
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    • 2008
  • In this study, a short-wavelength coplanar-type transmission line employing periodic ground structure (PGS) was developed for application to miniaturized on-chip passive component on Si Radio Frequency Integrated Circuit (RFIC). The transmission line employing PGS showed shorter wavelength and lower characteristic impedance than conventional coplanar-type transmission line. The wavelength of the transmission line employing PGS structure was 57 % of the conventional coplanar-type transmission line on Si substrate. Using the theoretical analysis. basic characteristics of the transmission line employing PGS (e.g., bandwidth. loss, impedance, and resonance characteristics) were also investigated in order to evaluate its suitability for application to a development of miniaturized passive on-chip components on silicon RFIC. According to the results. the bandwidth of the transmission line employing PGS was more than 895 GHz as long as T is less than 20${\mu}m$, and the resonance characteristic was observed in 1239 GHz, which indicates that the PPGM structure is a promising candidate for application to a development of miniaturized on-chip passive components on Si RFIC.