• Proceedings of the KIEE Conference
• /
• 2005.04a
• /
• pp.55-57
• /
• 2005

This paper deals with the analysis of bearing current in H-bridge seven level multilevel inverter fed induction motor. In the previous researches utilized electromagnetic equations to derive the parasitic capacitance or measured capacitance parameters, but we used FEM to derive parasitic capacitances and defined the equivalent circuit parameters in our strategy. Then we compared suggested method with conventional method in 60 [Hz] no load condition.

• The Transactions of the Korean Institute of Power Electronics
• /
• v.10 no.1
• /
• pp.70-77
• /
• 2005

A new converter to transfer energy from a low-voltage AC current source to a battery is proposed. It is focused to find operational modes of the converter. The low-voltage AC current source is an equivalent of the piezoelectric generator, which converts the mechanical energy to the electric energy. The converter consists of a full-bridge MOSFET rectifier and a MOSFET boost converter in order to make the converter small and efficient. The operational principle and modes of the converter are investigated with the consideration of effects of the parasitic capacitances of MOSFETs and diode. The results are proved with simulation studies using PSIM and Pspice.

• Proceedings of the KIPE Conference
• /
• 2013.07a
• /
• pp.347-349
• /
• 2013

This paper describes analysis and calculation of line frequency ripple current according to output capacitor value and effects of LED connection in the single stage flyback converter with high power factor. The low frequency output ripple current delivered from single stage converter has been analyzed in detail and the method evaluating parasitic resistance included in LED has been provided. In order to verify the equation derived in this paper, the single stage flyback converter has been designed with constant output current regulation with DCM operation. Experiments were conducted with different LED load structures to analyze the effect of LED parasitic resistance on output ripple current. As test results, the calculation can provide guide line to select capacitor values depending on output ripple current and LED characteristics.

• The Transactions of the Korean Institute of Power Electronics
• /
• v.24 no.1
• /
• pp.56-61
• /
• 2019

In this study, a reduction method of leakage current in a three-level photovoltaic power-conditioning system (PCS) is proposed and verified by simulation and experiment. Leakage current generation is analyzed through an equivalent model of the common mode voltage considering a significant parasitic capacitance existing between the photovoltaic array and ground. A leakage current reduction method using pulse-width modulation (PWM) method is also proposed, and a 10-kW three-level photovoltaic PCS simulation and experiment is performed with a $1{\mu}F$ parasitic capacitor based on 100 nF/kW. The proposed method using the PWM method is verified to reduce the leakage current by 73% compared with the conventional PWM method.

• Journal of agricultural medicine and community health
• /
• v.15 no.1
• /
• pp.49-55
• /
• 1990

Zoonoses are those diseases and infections that are naturally transmitted between vertebrate animals and man. At present, approximately 175 diseases caused by virus, rickettsia, bacteria, protozoa and helminthes as well as some of arthropods and the number is continually increasing. Although zoonoses are generally recognized as significant health problems, the actual prevalence and incidence of zoonotic infections is difficult to determine. Medical services in a rural area are scarce and ill persons may have little chance to see a physician. Furthermore, a lack of physician awareness and of appropriate diagnostic support is made often misdiagnosis. In rural Korea, parasitic disease is still important subject in the field of zoonotic infections considering its number and morbidity. Recently there was conspicuous reduction of soil-transmitted parasitic diseases (i.e. ascariasis. hookworms, trichuriasis), but clonorchiasis. intestinal trematodiases and taeniasis are a considerable problem. This is often significantly related to human behavioral patterns based on socio-economic and cultural conditions and linked with the local biologic and physical environment. The most of all parasitic zoonoses to man and animals are the food-transmitted parasitic diseases, and domestic animals such as dog, cat, pig, as well as fat and some mammals, ruminants and birds are act as reservoir hosts. In the present topics, current problems of parasitic zoonoses caused by protozoan infections (i. e. toxoplasmosis, pneumocystosis and cryptosporidiosis) which are the most common opportunistic in AIDS or immunocompromised persons, trematode infections (i.e. clonorchiasis, paragonimiasis and some intestinal tremadodiases). cestode infections such as cysticercosis and sparganosis, and some nematode infections of anisakiasis, thelaziasis and strongyloidiasis, are discussed here those on the occurrence in man and animals and the source of transmission as well as prevention and control measures in Korea.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.12 no.3
• /
• pp.270-277
• /
• 2012

This paper presents a new DAC design strategy to achieve a wideband dynamic linearity by increasing the bandwidth of the output impedance. In order to reduce the dominant parasitic capacitance of the conventional matrix structure, all the cells associated with a unit current source and its control are stacked in a single column very closely (stacked unit cell structure). To further reduce the parasitic capacitance, the size of the unit current source is considerably reduced at the sacrifice of matching yield. The degraded matching of the current sources is compensated for by a self-calibration. A prototype 6-bit 3.3-GS/s current-steering full binary DAC was fabricated in a 1P9M 90 nm CMOS process. The DAC shows an SFDR of 36.4 dB at 3.3 GS/s Nyquist input signal. The active area of the DAC occupies only $0.0546mm^2$ (0.21 mm ${\times}$ 0.26 mm).

• Journal of electromagnetic engineering and science
• /
• v.14 no.4
• /
• pp.376-381
• /
• 2014

We present a CMOS rail-to-rail class-AB amplifier using dynamic current biasing to improve the delay response of the error amplifier in a low-dropout (LDO) regulator, which is a building block for a wireless power transfer receiver. The response time of conventional error amplifiers deteriorates by slewing due to parasitic capacitance generated at the pass transistor of the LDO regulator. To enhance slewing, an error amplifier with dynamic current biasing was devised. The LDO regulator with the proposed error amplifier was fabricated in a $0.35-{\mu}m$ high-voltage BCDMOS process. We obtained an output voltage of 4 V with a range of input voltages between 4.7 V and 7 V and an output current of up to 212 mA. The settling time during line transient was measured as $9{\mu}s$ for an input variation of 4.7-6 V. In addition, an output capacitor of 100 pF was realized on chip integration.

• Proceedings of the KIPE Conference
• /
• 2020.08a
• /
• pp.346-347
• /
• 2020

This paper presents the two combination methods for leakage current reduction in photovoltaic system PCS. The leakage current in the photovoltaic system generated from the parasitic capacitance existing between the photovoltaic system and ground relevance to common mode voltage caused by PWM switching. Firstly, Leakage current reduced by a PWM method using two carriers with 180-degree phase different. Secondly, the leakage current is more reduced by connecting LCL filter to the mid-point of DC link. This combining method is revealed in PSIM simulation with 1 uF parasitic capacitance.

• Journal of the Institute of Electronics and Information Engineers
• /
• v.50 no.10
• /
• pp.67-75
• /
• 2013

In this paper, an analytical model is presented for the source/drain parasitic resistance of FinFET. The parasitic resistance is a important part of a total resistance in FinFET because of current flow through the narrow fin. The model incorporates the contribution of contact and spreading resistances considering three-dimensional current flow. The contact resistance is modeled taking into account the current flow and parallel connection of dividing parts. The spreading resistance is modeled by difference between wide and narrow and using integral. We show excellent agreement between our model and simulation which is conducted by Raphael, 3D numerical field solver. It is possible to improve the accuracy of compact model such as BSIM-CMG using the proposed model.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
• /
• v.19 no.4
• /
• pp.71-78
• /
• 2005

This paper proposes a novel multi-level energy recovery sustaining driver for AC PDP(Plasma Display Panel), which solves the problems of the conventional multi-level sustaining driver. While the conventional circuit improves the voltage md current stress of the switching elements in Weber circuit not only there are parasitic resonant currents between resonant inductors and parasitic capacitance and hard switching, but also the changing period between 0 and sustain voltage is too long. Comparing the proposed circuit with the conventional circuit, the number of components are reduced and the parasitic resonant currents in resonant inductors are eliminated Moreover the hard switching problem is solved by using CIM(Current Injection Method) and the operating frequency will be high as much as possible by removing Vs/2 sustain period. And the circuit operations of the proposed circuit are analyzed for each mode and the validity is verified by the simulations using PSpice program.