• Title/Summary/Keyword: parallel system

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A Study on the Parallel Operation Control Technique of On-line UPS System (무정전전원장치의 병렬운전 제어기법에 관한 연구)

  • 곽철훈;최규하
    • The Transactions of the Korean Institute of Power Electronics
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    • v.8 no.6
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    • pp.585-592
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    • 2003
  • The parallel operation system of UPS is used to increase reliability of power source at critical load. But parallel UPS system has a few defects, impedance is different from each other and circulating current occurs between UPSs, due to line impedance and parameter variation, though controlled by the same synchronization signal. According to such characteristic of parallel UPS, balanced load-sharing control is the most important technique in parallel UPS operation. In this paper, a novel power deviation compensation algorithm is proposed. it is composed of voltage controller to compensate power deviation that be calculated by using active and reactive current deviation between Inverters on synchronous d-q reference frame.

An Implementation of the DEVS Formalism on a Parallel Distributed Environment (병렬 분산 환경에서의 DEVS 형식론의 구현)

  • 성영락
    • Journal of the Korea Society for Simulation
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    • v.1 no.1
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    • pp.64-76
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    • 1992
  • The DEVS(discrete event system specificaition) formalism specifies a discrete event system in a hierarchical, modular form. DEVSIM++ is a C++based general purpose DEVS abstract simulator which can simulate systems modeled by the DEVS formalism in a sequential environment. This paper describes P-DEVSIM++which is a parallel version of DEVSIM++ . In P-DEVSIM++, the external and internal event of DEVS models can by processed in parallel. For such processing, we propose a parallel, distributed optimistic simulation algorithm based on the Time Warp approach. However, the proposed algorithm localizes the rollback of a model within itself, not possible in the standard Time Warp approach. An advantage of such localization is that the simulation time may be reduced. To evaluate its performance, we simulate a single bus multiprocessor architecture system with an external common memory. Simulation result shows that significant speedup is made possible with our algorithm in a parallel environment.

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Design to Chip with Multi-Access Memory System and Parallel Processor for 16 Processing Elements of Image Processing Purpose (영상처리용 16개의 처리기를 위한 다중접근기억장치 및 병렬처리기의 칩 설계)

  • Lim, Jae-Ho;Park, Seong-Mi;Park, Jong-Won
    • Journal of Korea Multimedia Society
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    • v.14 no.11
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    • pp.1401-1408
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    • 2011
  • This dissertation present a chip with Multi-Access Memory System(MAMS) and parallel processor for 16 Processing Elements of image processing purpose. MAMS is a kind of parallel access memory system and can simultaneously access to random pixel datas with eight types. It is possible to set a interval about pixel datas to access, too. The parallel processor built-in MAMS actually has been realized in 2003 but its performance fell short of a real time process for high-definition images. I designed a improved parallel processing system by means of addition and expansion of Memory Modules and Processing Elements of previous one. It is feasible to perform a Morphological Closing at the speed of 3 times of the previous one and 6 times of serial system.

Parallel Pipelined volume rendering of artifical heart using WISE on Grid (Grid workflow system을 이용한 인공 심장 Parallel pipelined volume render ing system)

  • 박진성;류소현;권용원;정창성
    • Proceedings of the Korean Information Science Society Conference
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    • 2004.04a
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    • pp.67-69
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    • 2004
  • 본 논문은 Grid상의 workflow 시스템인 Workflow based Grid Portal for PSE(이하 WISE)를 이용한 인공 심장의 3차원 병렬 volume rendering system 디자인과 구현에 대하여 기술한다. Grid는 전 세계에 분산되어 있는 고성능, 대용량 자원들을 고속 네트워크로 연동하여 사용할 수 있게 하는 환경이며, WISE 시스템은 workflow 개념을 도입하여, 이런 자원들의 효율적이고 편리하게 관리해주고 아울러 여러 가지 패턴을 이용해 프로그래밍 할 수 있게 해주는 middleware이다. 본 논문에서는 Grid 상에서 WISE system에서 제공하는 프로그래밍 패턴을 이용하여 구조화되어 있지 않은 인공심장 데이터를 병렬 processing Pipeline 모델을 바탕으로 효율적인 parallel 3차원 가시화를 하기 위한 parallel pipelined volume rendering system을 구현하였다.

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Voltage Control in a Novel Three-Phase Line Interactive UPS System with Parallel-Series Active Power Line Conditioning Capabilities using AC Line Reactor (AC 라인 리액터와 병렬 및 직렬 능동필터를 가지는 새로운 3상 Line-Interactive UPS 시스뎀의 전압제어)

  • Ji, Jun-Keun
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.7 no.6
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    • pp.1072-1077
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    • 2006
  • In this paper a novel 3-phase line interactive UPS(Uninterruptible Power Supply) system with parallel-series active power-line conditioning capability using AC line reactor and two four-leg PWM VSCs(Voltage Source Converters) is proposed. And the strategy of voltage control in proposed UPS system is explained. The objective of voltage control in parallel(shunt) and series PWM VSC of proposed UPS system is to guarantee satisfactory characteristics in steady state and transient state.

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Design of Dual-Band Pass Filter Using Parallel Coupled SIR (Parallel Coupled SIR을 이용한 이중대역 통과필터 설계 연구)

  • Kim, Koon-Tae;Paek, Hyun;Kim, Hyeong-Seok
    • 한국정보통신설비학회:학술대회논문집
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    • 2009.08a
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    • pp.215-218
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    • 2009
  • In this paper, Dual-band bandpass filter studied design using Parallel Coupled SIR(Stepped Impedance Resonator). This Dual-band bandpass filter design SIR of half-wavelength by Parallel-coupled type that is available to RFID system and Changed structure in Meander form by size reduce. Because seen Dual-band bandpass filter is designed so that is applicable for frequency 433MHz and 2.45GHz of RFID system is very wide distance between two pass-band, establish 433MHz by fundamental frequency and controlled 2.45GHz by 2st spurious resonance frequency bandstop filter of 1st spurious resonance frequency and Parallel coupled SIR Combine to remove 1st spurious resonance frequency.

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Adaptive Parallel Decomposition for Multidisciplinary Design

  • Park, Hyung-Wook;Lee, Se J.;Lee, Hyun-Seop;Park, Dong-Hoon
    • Journal of Mechanical Science and Technology
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    • v.18 no.5
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    • pp.814-819
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    • 2004
  • The conceptual design of a rotorcraft system involves many different analysis disciplines. The decomposition of such a system into several subsystems can make analysis and design more efficient in terms of the total computation time. Adaptive parallel decomposition makes the structure of the overall design problem suitable to apply the multidisciplinary design optimization methodologies and it can exploit parallel computing. This study proposes a decomposition method which adaptively determines the number and sequence of analyses in each sub-problem corresponding to the available number of processors in parallel. A rotorcraft design problem is solved and as a result, the adaptive parallel decomposition method shows better performance than other previous methods for the selected design problem.

A Parallel Computation of Finite Element Analysis on a Transputer System (트랜스퓨터를 이용한 유안영속해석의 병렬계산)

  • Kim, Keun-Hwan;Choi, Kyung;Jung, Hyun-Kyo;Lee, Ki-Sik;Hahn, Song-Yop
    • The Transactions of the Korean Institute of Electrical Engineers
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    • v.41 no.7
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    • pp.735-741
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    • 1992
  • This paper presents a parallel algorithm for the finite element analysis using relatively inexpensive transputer parallel system. The substructure method, which is highly parallel in nature, is used to improve the parallel computing efficiency by splitting up the whole structure into substructures. The proposed algorithm is applied to a simple two-dimensional magnetostatic problem. It is found that the more the number of transputer is increased, the more the total computation time is reduced. And the computational efficiency becomes better as the number of internal boundary nodes becomes smaller.

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Realtime Monitoring and Visualization for PDP System (PDP 시스템의 실시간 모니터링 및 시각화)

  • 김수자;송은하;박복자;정영식
    • Journal of Korea Multimedia Society
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    • v.7 no.5
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    • pp.755-765
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    • 2004
  • Recently, the Internet-based distributed/parallel computing using many of idle hosts has been demonstrated its usefulness for processings of a large-scale task and involving several important issues. While executing a large-scale task, the realtime monitoring is required for adaptive strategy of the performance and state change of host. This paper provides the realtime monitoring and visualization on global computing infrastructure called PDP(Parallel Distributed Processing) which is a parallel computing framework implemented with Jana for parallel computing on the Internet.

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A New Design on the Parallel Load Type IGBT Brake Chopper System for KTX-1 High Speed Train (KTX-1 고속전철의 병렬부하형 IGBT 제동초퍼장치 설계에 관한 연구)

  • Youn, Cha-Joong;Noh, Myoung-Gyu;Lee, Eul-Jae
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.62 no.3
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    • pp.424-430
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    • 2013
  • This paper presents a new design works for the braking chopper system which is included in the propulsion system of KTX high speed train. Due to the current fed type synchronous motors used in the propulsion system, some different behaviors are shown comparing to the voltage type other chopper systems. Specially this chopper system acts either braking controlling or regenerative power controlling system with a parallel resistive load in the propulsion system. In this paper, an improved simple high power IGBT brake chopper system has proposed which is able to be replaced with an existing complicated GTO chopper system. The analytical approaches to the parallel load type current chopper system and the propper snubber circuits calculation were explained in this paper to control new chopper system. In addition, the thermal resistance of the cooling system for power dissipation of IGBT modules was calculated also. Finally several PC simulations have been done to clarify its availability.