• Journal of the Microelectronics and Packaging Society
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• v.19 no.3
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• pp.49-56
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• 2012

Recently, by the trends of electronic package to be smaller, thinner and more integrative, fine bump is required. but It can result in the electrical short by reduced cross-section of UBM and diameter of bump. Especially, the formation of IMCs and KV can have a significant affects about electrical and mechanical properties. In this paper, we analyzed the thermal deformation of flip-chip bump by using FEM. Through Thermal Cycling Test (TCT) of flip-chip package, We analyzed the properties of the thermal deformation. and We confirmed that the thermal deformation of the bump can have a significant impact on the driving system. So we selected IMCs thickness and bump diameter as variable which is expected to have implications for characteristics of thermal deformation. and we performed analysis of temperature, thermal stress and thermal deformation. Then we investigated the cause of the IMC's effects.

• Journal of the Microelectronics and Packaging Society
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• v.17 no.4
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• pp.19-26
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• 2010

We found that saturated water vapor pressure is the most dominant stress factor for the degradation phenomenon in the package for high-power phosphor-converted white light emitting diode (high power LED). Also, we proved that saturated water vapor pressure is effective acceleration stress of LED package degradation from an acceleration life test. Test conditions were $121^{\circ}C$, 100% R.H., and max. 168 h storage with and without 350 mA. The accelerating tests in both conditions cause optical power loss, reduction of spectrum intensity, device leakage current, and thermal resistance in the package. Also, dark brown color and pore induced by hygro-mechanical stress partially contribute to the degradation of LED package. From these results, we have known that the saturated water vapor pressure stress is adequate as the acceleration stress for shortening life test time of LED packages.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.17 no.6
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• pp.708-714
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• 2016

In today's semiconductor industry, manufacturing technology is being developed for the purpose of processing large amounts of data and improving the speed of data processing. The packaging process in semiconductor manufacturing is utilized for the purpose of protecting the chips from the external environment and supplying electric power between the terminals. Nowadays, the WLP (Wafer-Level Packaging) process is mainly used in semiconductor manufacturing because of its high productivity. All of the silicon dies on the wafer are subjected to a high pressure and temperature during the molding process, so that die shift and warpage inevitably occur. This phenomenon deteriorates the positioning accuracy in the subsequent re-distribution layer (RDL) process. In this study, in order to minimize the die shift, a vision inspection system is developed to collect the die shift measurement data.

• Journal of the Microelectronics and Packaging Society
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• v.11 no.3 s.32
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• pp.47-53
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• 2004

Eutectic Au-20Sn(compositions are all in weight percent unless specified otherwise) solder alloys were soldered on the Ni substrate with various time and temperature. The composition, phase identification and morphology of intermetallic compounds(IMC) at the interface were examined using Scanning Electron Microscopy(SEM). There were two types of IMCs, $(Au,Ni)_3Sn_2$ and $(Au,Ni)_3Sn$ at the interface. The transition in morphology of $(Au,Ni)_3Sn_2$ has been observed at $300{\~}400^{\circ}C$. The morphology transition of $(Au,Ni)_3Sn_2$ is due to the decrease of enthalpy of formation of $(Au,Ni)_3Sn_2$ phase and has been explained well by Jackson's parameter with temperature. Because the number of diffusion channel is different at each soldering temperature, IMC thickness is nearly same at all temperature.

• Journal of Environmental Health Sciences
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• v.42 no.3
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• pp.160-168
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• 2016

Objectives: Materials coming into contact with food may result in the migration of chemical substances into the food. To protect consumers from exposure, Regulation (EU) No. 10/2011 specifies the use of standard migration tests. Polyethylene terephthalate (PET), widely used for food packaging materials, has drawn the attention of researchers because unwanted migration of PET into food might occur when consumers reuse packaging material. The aim of this study was to predict and develop a migration model for two components, acetaldehyde and butyraldehyde in PET, into food simulants under conditions of changing pH and solvents, such as those observed in fermented foods like kimchi or sauerkraut. Methods: Using a migration model based on Fick's second law of diffusion in one dimension, the migration of acetaldehyde and butyraldehyde from PET into a simulant of fermented food at $20^{\circ}C$ over 10 days was evaluated. The simulant for fermented food was modelled as 10% ethanol for three days, followed by 3% acetic acid for seven days. Results: The migration of acetaldehyde into the 10% ethanol was 0.36 times that of a simulated fermented food system, while that of butyraldehyde was 1.34 times greater. These results may have been influenced by the chemical interactions among the migrants, polymers and simulants, as well as by the solubilities of the migrants in polymers and simulants. Conclusion: Because food simulants have a limited capacity to mimic real food systems under the current migration model, an appropriate simulant and migration test should be considered in the case of increasing acidity. Furthermore, since the accuracy of the worst-case estimation of migration predicted by the current model is severely limited under changing food conditions, food simulants and their interactions should be further investigated with respect to conservative migration modelling.

• Journal of the Semiconductor & Display Technology
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• v.5 no.2 s.15
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• pp.33-36
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• 2006

Many issues arose to use the Pb-free solder as adhesive materials in MEMS ICs and packaging. Then this study for easy and simple sealing method using adhesive materials was carried out to maintain hermetic characteristic in MEMS Package. In this study, Hermetic characteristic using negative PR (XP SU-8 3050 NO-2) as adhesive at the interface of Si test coupon/glass substrate and Si test coupon/LTCC substrate was examined. For experiment, the dispenser pressure was 4 MPa and the $200\;{\mu}m{\Phi}$ syringe nozzle was used. 3.0 mm/sec as speed of dispensing and 0.13 mm as the gap between Si test coupon and nozzle was selected to machine condition. 1 min at $65^{\circ}C$ and 15 min at $95^{\circ}C$ as Soft bake, $200\;mj/cm^2$ expose in 365 nm wavelength as UV expose, 1 min at $65^{\circ}C$ and 6 min at $95^{\circ}C$ as Post expose bake, 60 min at $150^{\circ}C$ as hard bake were selected to activation condition of negative PR. Hermetic sealing was achieved at the Si test coupon/ glass substrate and Si test coupon/LTCC substrate. The leak rate of Si test coupon/glass substrate was $5.9{\times}10^{-8}mbar-l/sec$, and there was no effect by adhesive method. The leak rate of Si test coupon/LTCC substrate was $4.9{\times}10^{-8}mbar-l/sec$, and there was no effect by dispensing cycle. Better leak rate value could be achieved to use modified substrate which prevent PR flow, to increase UV expose energy and to use system that controls gap automatically with vision.

• Journal of the Microelectronics and Packaging Society
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• v.21 no.4
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• pp.41-44
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• 2014

In this paper, we will investigate the activation energies of Nb for $TiO_2$ using Hall effect measurement and photoluminescence (PL) system. Nb-doped $TiO_2$ thin film was grown on $SrTiO_3$ substrate by pulsed laser deposition (PLD) technique. After measurements, activation energies of niobium donor were 14.52 meV in Hall effect measurement, and 6.72 meV in PL measurement, respectively. These results showed different tendencies which are measured from the samples with acceptor materials. Therefore, it is thought that more research on activation energies for dopants of shallow donor level is expected.

• Journal of the Microelectronics and Packaging Society
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• v.15 no.1
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• pp.59-64
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• 2008

Recently, DC-DC choppers must be increased switching frequency in order to achieve a small size, a light weight and a low noise. However, the switches of chopper are subjected to high switching power losses and switching stresses. As a result of these, the chopper system bring on a low power efficiency. To improved these, this paper is studied on a new DC-DC chopper of high efficiency operated with soft switching(that is, zero current switching and zero voltage switching, ZVCS), of semiconductor switches using in chopper. The soft switching operation is applied to a partial resonant method that the switches operate at zero current of inductor and zero voltage of capacitor in resonant circuit. And the partial resonant circuit makes use of a inductor using step-up and a snubber capacitor, the circuit topology of chopper is simple. Some simulative results on computer and experimental results confirm the validity of analytical results of the DC-DC chopper.

• Journal of the Microelectronics and Packaging Society
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• v.21 no.2
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• pp.37-41
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• 2014

One of the important developments in next generation electronic devices is the technology for power delivery and heat dissipation. In this study, the Cu-to-Cu flip chip bonding process was evaluated using the square ABL power bumps and circular I/O bumps. The difference in bump height after Cu electroplating followed by CMP process was about $0.3{\sim}0.5{\mu}m$ and the bump height after Cu electroplating only was about $1.1{\sim}1.4{\mu}m$. Also, the height of ABL bumps was higher than I/O bumps. The degree of Cu bump planarization and Cu bump height uniformity within a die affected significantly on the misalignment and bonding quality of Cu-to-Cu flip chip bonding process. To utilize Cu-to-Cu flip chip bonding with ABL bumps, both bump planarization and within-die bump height control are required.

• Journal of the Microelectronics and Packaging Society
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• v.23 no.4
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• pp.43-48
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• 2016

3-Dimensional System in Package (3-D SiP) structure (Amkor calls it mPossum-molded Possum) using double side Surface Mount Technology (SMT) and double side molding was evaluated in order to achieve small/thin form factor as well as good functionality by integration and double side layout. As the new platform on laminate substrate basis, molding process was challenge in mold flow balance at top and bottom side and package warpage control over the overall assembly process. There were two types of different molding process evaluated with 1) 1-step molding which was done at both side at the same time and 2) 2-step molding which was done at the conventional molding process twice. Mold simulation helped to narrow down the material selections and parameters available before actual sample build. There were many challenges for this first trial in design/ parameter and material types but optimized them to enable this structure.