• Journal of the Korean Geotechnical Society
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• v.34 no.5
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• pp.53-63
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• 2018

Dynamic soil-pile interaction is the main concern in the design of group piles under earthquake loadings. The lateral resistance of the pile group under dynamic loading becomes different from that of a single pile due to the group pile effect. However, this aspect has not yet been properly studied for the pile group under seismic loading condition. Thus, in this study the group pile effect was evaluated by performing a series of dynamic centrifuge tests on $3{\times}3$ group pile in dry loose sand. The multiplier coefficients for ultimate lateral resistance and subgrade reaction modulus were suggested to obtain the p-y curve of the group pile. The suggested coefficients were verified by performing the nonlinear dynamic analyses, which adopted Beam on Nonlinear Winkler Foundation model. The predicted behavior of the pile group showed the reasonable agreement compared with the results of the centrifuge tests under sinusoidal wave and artificial wave.

• 제어로봇시스템학회:학술대회논문집
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• 1989.10a
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• pp.127-130
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• 1989

The redundant manipulator extends the application fields of classical nonredundant manipulators. In this paper, we propose Premultiplier Model that describes the static behavior of redundant manipulator. This model provides insight and intuition about algebra and physics related to redundant manipulators. Active operational space stiffness control of redundant manipulators is proved to be always unstable and we propose a technique, based on our methodology, to make stiffness control stable.

• Proceedings of the IEEK Conference
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• 2003.07a
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• pp.294-297
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• 2003

This paper describes the design and the simulation of a frequency doubler for millimeter-wave applications using distributed amplifier technology. The designed frequency multiplier has 10% bandwidth at 58GHz output. This paper investigates nonlinear analysis of pHEMT frequency multipliers utilizing AM-AM and AM-PM distortion characteristics of frequency doubler. The conversion loss is 2.1dB and harmonic suppression is larger than 18.6dBc with 5dBm input power

• Kyungpook Mathematical Journal
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• v.49 no.4
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• pp.631-646
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• 2009

In the present investigation, we introduce new classes of p-valent meromorphic functions defined by Liu-Srivastava linear operator and the multiplier transform and study their properties by using certain first order differential subordination and superordination.

• Journal of information and communication convergence engineering
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• v.9 no.4
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• pp.435-440
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• 2011

This paper propose the method of constructing the highly efficiency adder and multiplier systems over finite fields. The addition arithmetic operation over finite field is simple comparatively because that addition arithmetic operation is analyzed by each digit modP summation independently. But in case of multiplication arithmetic operation, we generate maximum k=2m-2 degree of ${\alpha}^k$ terms, therefore we decrease k into m-1 degree using irreducible primitive polynomial. We propose two method of control signal generation for the purpose of performing above decrease process. One method is the combinational logic expression and the other method is universal signal generation. The proposed method of constructing the highly adder/multiplier systems is as following. First of all, we obtain algorithms for addition and multiplication arithmetic operation based on the mathematical properties over finite fields, next we construct basic cell of A-cell and M-cell using T-gate and modP cyclic gate. Finally we construct adder module and multiplier module over finite fields after synthesizing ${\alpha}^k$ generation module and control signal CSt generation module with A-cell and M-cell. Next, we constructing the arithmetic operation unit over finite fields. Then, we propose the future research and prospects.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.39 no.6
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• pp.26-33
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• 2002

In this paper, a new four-quadrant MOS analog multiplier Is proposed using the quarter-square technique, which is based on the quadratic characteristics of MOS transistor operating in the saturation region and the difference operation of a source-coupled differential circuits. The proposed circuit has been fabricated in a p-well CMOS process. The multiplier achieves a total harmonic distortion of less than 1 percent for the both input ranges of 50 percent of power supply, a -3㏈ bandwidth of 30㎒ a dynamic range of 81㏈ and a power consumption of 40㎽. The active chip area is 0.54㎟. The supposed multiplier circuit is simple and adjust high frequency application because one input signal transfer output by one transistor.

• Journal of IKEEE
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• v.7 no.1 s.12
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• pp.9-15
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• 2003

An optimized finite-field multiplier is proposed for encryption and error correction devices. It is based on a modified Linear Feedback Shift Register (LFSR) which has lower power consumption and smaller area than prior LFSR-based finite-field multipliers. The proposed finite field multiplier for GF(2n) multiplies two n-bit polynomials using polynomial basis to produce $z(x)=a(x)^*b(x)$ mod p(x), where p(x) is a irreducible polynomial for the Galois Field. The LFSR based on a serial multiplication structure has less complex circuits than array structures and hybrid structures. It is efficient to use the LFSR structure for systems with limited area and power consumption. The prior finite-field multipliers need 3${\cdot}$m flip-flops for multiplication of m-bit polynomials. Consequently, they need 6${\cdot}$m latches because one flip-flop consists of two latches. The proposed finite-field multiplier requires only 4${\cdot}$m latches for m-bit multiplication, which results in 1/3 smaller area than the prior finite-field multipliers. As a result, it can be used effectively in encryption and error correction devices with low-power consumption and small area.

• Journal of Advanced Navigation Technology
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• v.15 no.4
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• pp.596-601
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• 2011

This paper has presented research results for the switching mode class E frequency multiplier that has simple circuit structure and high efficiency. Frequency multiplication is coming from the nonlinearity of the active component, and this paper models the FET active component as a simple switch and some parasitics to analyze the characteristics. The matching component parameters for the class E frequency doubler have been derived with modeling the FET as a input controlled switch and some parasitics. A circuit simulator, ADS, is used to simulate the output voltage and current waveform and efficiency with the variation of the parasitic values. With 2.9GHz input and 2V bias, the drain efficiency has been decreased from 98% to 28% with changing the parasitic capacitance from 0pF to 1pF at 5.8GHz output, which shows that the parasitic capacitance CP has the most significant effect on the efficiency among the parasitics of FET.

• Journal of the Korean Geotechnical Society
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• v.26 no.8
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• pp.77-88
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• 2010

In this study, 1 g shaking table group pile tests were performed for various conditions of subgrade and pile spacing. The pile spacing was changed from three to seven times of pile diameters. It could be confirmed that the dynamic p-y curves for the group pile observed as the results of a series of shaking table tests show difference according to the pile spacing, the pile location within the pile group, the relative density of subgrade and the excess pore pressure during earthquake. The dynamic p-multipliers were calculated by comparing the dynamic p-y backbone curves of a single pile suggested by Yang (2009) and dynamic p-y curves for the group pile. Dynamic p-multiplier values overall increase as the relative density of subgrade and amplitude of input acceleration increase. The dynamic group pile effect was neglected, if the pile spacing was seven times as large as pile diameters. It was found that the exisiting p-multiplier values suggested by various researchers for the static and dynamic loading, and the values recommended by globally used specifications show difference with the test results by up to 0.7 (approximately 70%). Therefore, the dynamic p-multipliers were newly suggested according to the pile spacing and the relative density of subgrade using the test results.

• Journal of the Korean GEO-environmental Society
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• v.13 no.3
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• pp.85-90
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• 2012

This paper deals with the results for a numerical analysis of single piles and pile groups in multi-layers soil(granite soil-clay-granite soil) subjected to monotonous lateral loading using the ABAQUS finite element software. The investigated variables in this study include free head and embedded capped single pile, pile diameter (0.5m), pile length (10m), and pile groups. Numerical analyses were conducted by variation of spacing piles(s=3D, 4D, 5D) to compare the behaviour of single pile without cap and group pile. The $1{\times}3$ pile group(leading pile, middle pile, trail pile) was selected to investigate the individual pile and group lateral resistance, the distribution of the resistance among the piles. The analysis model of clay and the material of granite soil was modeled by using Druker-Prager constitutive relationship and existing treatise respectively. The pile was considered as a elastic circular concrete pile. As a result, the more pile space was extended, the value of P-multiplier is appeared to be less effective to leading pile. The lateral resistance of single-layer showed approximately 4-20% larger than the multi-layers.