• 제목/요약/키워드: oxide reduction

검색결과 1,337건 처리시간 0.031초

STATUS OF PYROPROCESSING TECHNOLOGY DEVELOPMENT IN KOREA

  • Song, Kee-Chan;Lee, Han-Soo;Hur, Jin-Mok;Kim, Jeong-Guk;Ahn, Do-Hee;Cho, Yung-Zun
    • Nuclear Engineering and Technology
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    • 제42권2호
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    • pp.131-144
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    • 2010
  • The Korea Atomic Energy Research Institute (KAERI) has been developing pyroprocessing technology for recycling useful resources from spent fuel since 1997. The process includes pretreatment, electroreduction, electrorefining, electrowinning, and a waste salt treatment system. This paper briefly addresses unit processes and related innovative technologies. As for the electroreduction step, a stainless steel mesh basket was applied for adaption of granules of uranium oxide. This basket was designed for ready handling and transfer of feed material. A graphite cathode was used for the continuous collection of uranium dendrite in the electrorefining system. This enhances the throughput of the electrorefiner. A particular mesh type stirrer was designed to inhibit uranium spill-over at the liquid Cd crucible. A residual actinide recovery system was also tested to recover TRU tracer. In order to reduce the waste volume, a crystallization method is employed for Cs and Sr removal. Experiments on the unit processes were tested successfully, and based on the results, engineering-scale equipment has been designed for the PRIDE (PyRoprocess Integrated inactive DEmonstration facility).

A 32nm and 0.9V CMOS Phase-Locked Loop with Leakage Current and Power Supply Noise Compensation

  • Kim, Kyung-Ki;Kim, Yong-Bin
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제7권1호
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    • pp.11-19
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    • 2007
  • This paper presents two novel compensation circuits for leakage current and power supply noise (PSN) in phase locked loop (PLL) using a nanometer CMOS technology. The leakage compensation circuit reduces the leakage current of the charge pump circuit which becomes more serious problem due to the thin gate oxide and small threshold voltage in nanometer CMOS technology and the PSN compensation circuit decreases the effect of power supply variation on the output frequency of VCO. The PLL design is based on a 32nm predictive CMOS technology and uses a 0.9V power supply voltage. The simulation results show that the proposed PLL achieves a 88% jitter reduction at 440MHz output frequency compared to the PLL without leakage compensator and its output frequency drift is little to 20% power supply voltage variations. The PLL has an output frequency range of $40M{\sim}725MHz$ with a multiplication range of 11023, and the RMS and peak-to-peak jitter are 5ps and 42.7ps, respectively.

SCR 촉매의 공간속도 및 선속도가 NOx 제거 효율에 미치는 영향 (Effect of NOx Removal Efficiency according to Space Velocity and Linear Velocity of SCR Catalyst)

  • 박진우;박삼식;구건우;홍정구
    • 한국분무공학회지
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    • 제21권2호
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    • pp.71-77
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    • 2016
  • Air pollutants nitrogen oxides are inevitably generated in the combustion reaction. Its amount trend is steadily increasing because the rapid modern industrialization and population growth. For this reason, NOx is controlled to reducing the harmful components in the exhaust gas. So Marine Environment Protection Committee (MEPC) take effect 'Tier I', 'Tier II' of air pollution regulation in 2005 and 2011 respectively. According to NOx emissions are strictly regulated management of the vessel through them. In addition, since 2016 the regulation enter into force in the next step 'Tier III' was confirmed by MEPC 66th committee. It's 80% enhanced emissions limits than the 'Tier I' Alternatively these emission regulation, research is actively being carried out about exhaust gas after-treatment methods through the vessel application of Selective Catalytic Reduction(SCR). Therefore depending on the basic specification of cell density according to the Area velocity, Space velocity, Linear velocity is studied the effects of NOx removal efficiency

Structure and Magnetic Characterization of Core-Shell Fe@ZrO2 Nanoparticles Synthesized by Sol-Gel Process

  • Chaubey, Girija S.;Kim, Jin-Kwon
    • Bulletin of the Korean Chemical Society
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    • 제28권12호
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    • pp.2279-2282
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    • 2007
  • Highly crystalline, uniform Fe nanoparticles were successfully synthesized and encapsulated in zirconia shell using sol-gel process. Two different approaches have been employed for the coating of Fe nanoparticle with zirconia. The thickness of zirconia shell can be readily controlled by altering molar ratio of Fe nanoparticle core to zirconia precursor in the first case where as reaction time was found to be most effective parameter to controlled the shell thickness in the second method. The structure and magnetic properties of the ZrO2-coated Fe nanoparticles were studied. TEM and HRTEM images show a typical core/shell structure in which spherical α-iron crystal sized of ~25 nm is surrounded by amorphous ZrO2 coating layer. TGA study showed an evidence of weight loss of less than 2% over the temperature range of 50-500 °C. The nanoparticles are basically in ferromagnetic state and their magnetic properties depend strongly on annealing temperature. The thermal treatment carried out in as-prepared sample resulted in reduction of coercivity and an increase in saturation magnetization. X-ray diffraction experiments on the samples after annealing at 400-600 °C indicate that the size of the Fe@ZrO2 particles is increased slightly with increasing annealing temperature, indicating the ZrO2 coating layer is effective to interrupt growing of iron particle according to heat treatment.

Study on the Performance Characteristics of Centrifugal Pump with Drag-reducing Surfactant Additives

  • Wang, Lu;Li, Feng-Chen;Dong, Yong;Cai, Wei-Hua;Su, Wen-Tao
    • International Journal of Fluid Machinery and Systems
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    • 제4권2호
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    • pp.223-228
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    • 2011
  • The performance characteristics of centrifugal pump were measured experimentally when running with tap water and drag-reducing surfactant (Octadecyl dimethyl amine oxide (OB-8)) solutions. Tests have been performed on five cases of surfactant solutions with different concentrations (0ppm (tap water), 200ppm, 500ppm, 900ppm and 1500ppm) and four different rotating speeds of pump (1500rpm, 2000rpm, 2500rpm and 2900rpm). Compared with tap water case, the experimental results show that the total pump heads for surfactant solution cases are higher. And the pump efficiency with surfactant solutions also increases, but the shaft power for surfactant solutions cases decreases compared to t hat for tap water. There exists an optimal temperature for surfactant solutions, which maximizes the pump efficiency.

Area-Power Trade-Offs for Flexible Filtering in Green Radios

  • Michael, Navin;Moy, Christophe;Vinod, Achutavarrier Prasad;Palicot, Jacques
    • Journal of Communications and Networks
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    • 제12권2호
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    • pp.158-167
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    • 2010
  • The energy efficiency of wireless infrastructure and terminals has been drawing renewed attention of late, due to their significant environmental cost. Emerging green communication paradigms such as cognitive radios, are also imposing the additional requirement of flexibility. This dual requirement of energy efficiency and flexibility poses new design challenges for implementing radio functional blocks. This paper focuses on the area vs. power trade-offs for the type of channel filters that are required in the digital frontend of a flexible, energy-efficient radio. In traditional CMOS circuits, increased area was traded for reduced dynamic power consumption. With leakage power emerging as the dominant mode of power consumption in nanoscale CMOS, these trade-offs must be revisited due to the strong correlation between area and leakage power. The current work discusses how the increased timing slacks obtained by increasing the parallelism can be exploited for overall power reduction even in nanoscale circuits. In this context the paper introduces the notion of 'area efficiency' and a metric for evaluating it. The proposed metric has also been used to compare the area efficiencies of different classes of time-shared filters.

CMP 공정에서 마이크로 스크래치 감소를 위한 슬러리 필터의 특성 (Characteristics of Slurry Filter for Reduction of CMP Slurry-induced Micro-scratch)

  • 김철복;김상용;서용진
    • 한국전기전자재료학회논문지
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    • 제14권7호
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    • pp.557-561
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    • 2001
  • Chemical mechanical polishing (CMP) process has been widely used to planarize dielectric layers, which can be applied to the integraded circuits for sub-micron technology. Despite the increased use of CMP process, it is difficult to accomplish the global planarization of in the defect-free inter-level dielectrics (ILD). Especially, defects such as micro-scratch lead to severe circuit failure which affect yield. CMP slurries can contain particles exceeding 1㎛ in size, which could cause micro-scratch on the wafer surface. The large particles in these slurries may be caused by particles agglomeration in slurry supply line. To reduce these defects, slurry filtration method has been recommended in oxide CMP. In this work, we have studied the effects of filtration and the defect trend as a function of polished wafer count using various filters in inter-metal dielectrics(IMD)-CMP process. The filter installation in CMP polisher could reduce defects after IMD-CMP process. As a result of micro-scratch formation, it is shown that slurry filter plays an important role in determining consumable pad lifetime. The filter lifetime is dominated by the defects. We have concluded that slurry filter lifetime is fixed by the degree of generating defects.

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인지질(DOPC)과 지방산(8A5H)의 혼합 LB막의 광이성질화 현상과 전기화학적 특성 (Electrochemical Properties and Photoisomerization of DOPC-8A5H Mixture Langmuir-Blogett Films)

  • 박근호;최성현;김남석;김덕술
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2004년도 하계학술대회 논문집 Vol.5 No.2
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    • pp.874-877
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    • 2004
  • We carried out this subject to observe electrochemical properties of 1,2-dioleoyl-sn- glycero-3-phosphocholine(DOPC) mixed with fatty acid containing azobenzene group by using cyclic voltammetry with a three-electrode system, An Ag/AgCl reference electrode, a platinum wire counter electrode and LB film-coated ITO working electrode in $NaClO_4$ solution. We investigated the photoisomerization and electrochemical property of the organic ultra thin film of fatty acid containing azobenzene was prepared on the hydrophilic ITO(idium tin oxide) glass plate by LB method. As a result, the absorption spectra of BASH and DOPC of mixture LB films was induced to photoisomerization by alternating irradiation of ultraviolet and visible light. A measuring range was reduced from initial potential to -1350mV, continuously oxidized to 1650 mV and measured to the initial point. The scan rate were 50, 100, 150 and 200 mV/s. As a results, LB films of BASH-DMPC appeared reversible process caused by the reduction-oxidation current from the cyclic voltammogram.

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Capacitance-voltage Characteristics of MOS Capacitors with Ge Nanocrystals Embedded in HfO2 Gate Material

  • Park, Byoung-Jun;Lee, Hye-Ryeong;Cho, Kyoung-Ah;Kim, Sang-Sig
    • 한국전기전자재료학회논문지
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    • 제21권8호
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    • pp.699-705
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    • 2008
  • Capacitance versus voltage (C-V) characteristics of Ge-nanocrystal (NC)-embedded metal-oxide-semiconductor (MOS) capacitors with $HfO_2$ gate material were investigated in this work. The current versus voltage (I-V) curves obtained from Ge-NC-embedded MOS capacitors fabricated with the $NH_3$ annealed $HfO_2$ gate material reveal the reduction of leakage current, compared with those of MOS capacitors fabricated with the $O_2$ annealed $HfO_2$ gate material. The C-V curves of the Ge-NC-embedded MOS capacitor with $HfO_2$ gate material annealed in $NH_3$ ambient exhibit counterclockwise hysteresis loop of about 3.45 V memory window when bias voltage was varied from -10 to + 10 V. The observed hysteresis loop indicates the presence of charge storages in the Ge NCs caused by the Fowler-Nordheim (F-N) tunneling. In addition, capacitance versus time characteristics of Ge-NC-embedded MOS capacitors with $HfO_2$ gate material were analyzed to investigate their retention property.

플레티늄-실리사이드를 이용한 쇼트키 장벽 다결정 박막 트랜지스터트랜지스터 (Schottky barrier polycrystalline silicon thin film transistor by using platinum-silicided source and drain)

  • 신진욱;최철종;정홍배;정종완;조원주
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2008년도 추계학술대회 논문집 Vol.21
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    • pp.80-81
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    • 2008
  • Schottky barrier thin film transistors (SB-TFT) on polycrystalline silicon(poly-Si) are fabricated by platinum silicided source/drain for p-type SB-TFT. High quality poly-Si film were obtained by crystallizing the amorphous Si film with excimer laser annealing (ELA) or solid phase crystallization (SPC) method. The fabricated poly-Si SB-TFTs showed low leakage current level and a large on/off current ratio larger than $10^5$. Significant improvement of electrical characteristics were obtained by the additional forming gas annealing in 2% $H_2/N_2$ ambient, which is attributed to the termination of dangling bond at the poly-Si grain boundaries as well as the reduction of interface trap states at gate oxide/poly-Si channel.

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