• Journal of Surface Science and Engineering
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• v.53 no.4
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• pp.144-152
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• 2020

In the manufacturing process of joining of aluminum alloy and polymer, the strength of the metal-polymer joining is greatly influenced by the nanostructure of the oxide film. In this study, we investigated the dependence of joining strength on the thickness, structure, pore formation and surface roughness of the formed film. After the two-step anodization process, the surface oxide layer became thinner and rougher resulting in higher joining strength with the polymer. More specifically, after the two-step anodization, the surface roughness, Ra increased from 2.3 to 3.2 ㎛ with pore of three-dimensional (3D) nanostructure, and the thickness of the oxide film was thinned from 350 to 250 nm. Accordingly, the joining strength of the aluminum alloy with polymer increased from 23 to 30 MPa.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.11 no.6
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• pp.742-750
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• 2018

In this paper, in order to enable zero-layer FTP cell using only 5V MOS devices on the basis of $0.13{\mu}m$ BCD process, the tunnel oxide thickness is used as the gate oxide thickness of $125{\AA}$ of the 5V MOS device at 82A. The HDNW layer, which is the default in the BCD process, is used. Thus, the proposed zero layer FTP cell does not require the addition of tunnel oxide and DNW mask. Also, from the viewpoint of memory IP design, a single memory structure which is used only for trimming analog circuit of PMIC chip is used instead of the dual memory structure dividing into designer memory area and user memory area. The start-up circuit of the BGR (Bandgap Reference Voltage) generator circuit is designed to operate in the voltage range of 1.8V to 5.5V. On the other hand, when the 64-bit FTP memory IP is powered on, the internal read signal is designed to maintain the initial read data at 00H. The layout size of the 64-bit FTP IP designed using the $0.13-{\mu}m$ Magnachip process .is $485.21{\mu}m{\times}440.665{\mu}m$($=0.214mm^2$).

• Journal of the Korean Magnetics Society
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• v.14 no.6
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• pp.236-239
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• 2004

We studied the specular spin valve (SSV) having the spin filter layer (SFL) in contact with the ultrathin free layer composed of Ta3/NiFe2/IrMn7/CoFel/(NOLl)/CoFe2/Cu1.8/CoFe( $t_{F}$)/Cu( $t_{SF}$ )/(NOL2)/Ta3.5 (in nm) by the magnetron sputtering system. For this antiferromagnetic I $r_{22}$M $n_{78}$-pinned spin filter specular spin valve (SFSSV) films, an optimal magnetoresistance (MR) ratio of 11.9% was obtained when both the free layer thickness ( $t_{F}$) and the SFL thickness ( $t_{SF}$ ) were 1.5 nm, and the MR ratio higher than 11% was maintained even when the $t_{F}$ was reduced to 1.0 nm. It was due to increase of specular electron by the nano-oxide layer (NOL) and of current shunting through the SFL. Moreover, the interlayer coupling field ( $H_{int}$) between free layer and pinned layer could be explained by considering the RKKY and magnetostatic coupling. The coercivity of the free layer ( $H_{cf}$ ) was significantly reduced as compared to the traditional spin valve (TSV), and was remained as low as 4 Oe when the $t_{F}$ varied from 1 nm to 4 urn. It was found that the SFL made it possible to reduce the free layer thickness and enhance the MR ratio without degrading the soft magnetic property of the free layer.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.143.1-143.1
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• 2016

Ge is a promising candidate to replace Si in MOSFET because of its superior carrier mobility, particular that of the hole. However Ge oxide is thermodynamically unstable. At elevated temperature, GeO is formed at the interface of Ge and GeO2, and its formation increases the interface defect density, degrading its device performance. In search for a method to surmount the problem, we investigated Ge oxidation through an inert capped oxide layer. For this work, we prepared low doped n-type Ge(100) wafer by removing native oxide and depositing a capping layer, and show that GeO2 interface can be successfully grown through the capping layer by thermal oxidation in a furnace. The thickness and quality of thus grown GeO2 interface was examined by ellipsometry, XPS, and AFM, along with I-V and C-V measurements performed at 100K to 300K. We will present the result of our investigation, and provide the discussion on the oxide growth rate, interface state density and electrical characteristics in comparison with other studies using the direct oxidation method.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1997.11a
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• pp.25-29
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• 1997

Capacitor-type MONOS (metal-oxide-nitride-oxide- semiconductor) NVSMs with 23$\AA$ tunneling oxide and 40$\AA$ blocking oxide were fabricated. The thicknesses of nitride layer were 45$\AA$, 91$\AA$ and 223$\AA$, Breakdown characteristics of MONOS devices were measured to investigate the reliability of superthin ONO structure using ramp voltage and constant voltage method. Reducing the nitride thickness will significantly increase the reliablity of MONOS NVSM.

• Korean Journal of Air-Conditioning and Refrigeration Engineering
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• v.24 no.3
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• pp.281-287
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• 2012

The internal oxide scale of twelve superheater and reheater tubes were tested which were serviced for 30,000~120,000 hours in thermal power plants. The oxide scale was formed in three layers. The Cr-rich area was observed beneath the original metal surface. The hematite ($Fe_2O_3$) phase was formed on the outer surface. The intermediate layer was magnetite ($Fe_3O_4$). The thickness of Cr-rich layer was about half of the total scale. All layers grew during the operation hour of the plant. The thickness of thickest scale was 0.2mm in superheater tubes. This can increase the tube metal temperature about $7^{\circ}C$ more than initial state. $7^{\circ}C$ tube metal temperature can reduce tube life about 30%, but the boiler tube's design margin is big enough therefore it has been analyzed that it would not effect on the life span.

• Journal of Surface Science and Engineering
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• v.25 no.3
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• pp.107-116
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• 1992

The optimum thickness of Pd-Ni plated layers used as an electrical contact film was investigated by evaluating mechanical, thermal and environmental characteristics. The variations of morphologies and chemical compositions were studied by using SEM, EDS and ESCA. As a result of wear test, the wear resistance behavior of the gold plated layers was not changed with the sliding velocity changes. The palladium-nickel plated layer showed better wear resistance than the gold plated layer at low sliding velocity, but it showed poor wear resistance at high sliding velocity. Under the thermal condition of $400^{\circ}C$ in air, the gold thickness of $2\mu\textrm{m}$ without underplate on phosphorous bronze formed copper oxide on the surface layer by rapid diffusion of copper whereas the gold thickness of $0.8\mu\textrm{m}$ deposited on nickel and palladium-nickel underplate was stable at $400^{\circ}C$. Under the sulfur dioxide environments, the gold thickness of $0.3\mu\textrm{m}$ deposited on the nickel thickness of$ 3\mu\textrm{m}$ and the palladium-nickel thickness of $2\mu\textrm{m}$ underplate was more corrosion-resistant than the gold thickness of $2\mu\textrm{m}$ without underplate on phosphorous bronze. Under the nitric acid vapor environment, corrosion resistance of the gold film was superior to an equivalent thickness of the palladium-nickel film.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.28A no.5
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• pp.380-386
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• 1991

Hydrogen plasma-assisted epitaxial(PAE) growth of GaAs/Si and GaAs/Ge/Si with Ge buffer layer has been investigated. By means of photoluminescence, Nomarski microscopu, and $\alpha$-step, it could be known that GaAs on Si with Ge buffer layer has better crystalline quality than GaAs on Si without Ge buffer layer. The stoichiometry of GaAs layer on Si was confirmed by the depth profile of Auger electron spectroscope (AES). Also the native oxide(SiO$_2$) layer on Si substrate was plama-etched and the removal of the oxide layer was confirmed by AES. Photoluminescence peak wavelength of GaAs/Ge/Si with Ge buffer of 1\ulcorner thickness and GaAs growth rate of 160$\AA$/min was 8700$\AA$and FWHM was 12$\AA$.

• Journal of the Semiconductor & Display Technology
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• v.18 no.4
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• pp.134-137
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• 2019

In this paper, the data retention characteristics were analyzed to find out the thickness effect on the trap energy distribution of silicon nitride in the silicon-oxide-nitride-oxide-silicon (SONOS) flash memory devices. The nitride films were prepared by low pressure chemical vapor deposition (LPCVD). The flat band voltage shift in the programmed device was measured at the elevated temperatures to observe the thermal excitation of electrons from the nitride traps in the retention mode. The trap energy distribution was extracted using the charge decay rates and the experimental results show that the portion of the shallow interface trap in the total nitride trap amount including interface and bulk trap increases as the nitride thickness decreases.

• Journal of Electrochemical Science and Technology
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• v.8 no.4
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• pp.344-355
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• 2017

In this study, a numerical approach is adopted to investigate the effectiveness factors for distributed electrochemical reactions in thin active reaction layers of solid oxide fuel cells (SOFCs), taking into account the Butler-Volmer reaction kinetics. The mathematical equations for the electrochemical reaction and charge conduction process were formulated by assuming that the active reaction layer has a small thickness, homogeneous microstructure, and high effective electronic conductivity. The effectiveness factor is defined as the ratio of the actual reaction rate (or equivalently, current generation rate) in the active reaction layer to the nominal reaction rate. From extensive numerical calculations, the effectiveness factors were obtained for various charge transfer coefficients of 0.3-0.8. These effectiveness data were then fitted to simple correlation equations, and the resulting correlation coefficients are presented along with estimated magnitude of error.