• Journal of KIISE:Computing Practices and Letters
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• v.11 no.2
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• pp.149-156
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• 2005

The HLA is the simulation architecture standard that the civilian and military simulation communities are deeply interested in. We can find various successful practices applying HLA to constructive simulations such as war games in domestics and overseas. However, any case of real-time distributed simulations has not been reported. The reason is that a message transmission period via RTI in a network layer varies according to computing power, simulation nodes, transmission types, and packet size; further a message processing time in an application layer depends on its processing methods, thus too difficult to set up real-time constraints for the enhancement of a real-time resolution. Hence, in this paper we have studied the real-time constraints of RTI for the development of the M-SAM simulator. Thus we have developed a HLA based pilot simulator using 6 PC's in LAN and then measured and analysed the performance of the RTI. As the results of our work, we could obtain the quantitative values for message delay, RTI overhead and RTI packet transmission ratio by a real operation scenario and loads, which are not shown in the previous works. We also expect that the results can be used as a guideline to set up the number of targets, transmission frequency and message processing method in the development of the M-SAM simulator and similar applications.

• Journal of KIISE
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• v.44 no.10
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• pp.1005-1018
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• 2017

Recently, virtualization has become an essential component of cloud computing due to its various strengths, including maximizing server resource utilization, easy-to-maintain software, and enhanced data protection. However, since virtualization allows sharing physical resources among the VMs, the system performance can be deteriorated due to device contentions. In this paper, we first investigate the I/O overhead based on the number of VMs on the same server platform and analyze the block I/O process of the KVM hypervisor. We also propose an in-memory block cache mechanism, called QBic, to overcome I/O virtualization latency. QBic is capable of monitoring the block I/O process of the hypervisor and stores the data with a high access frequency in the cache. As a result, QBic provides a fast response for VMs and reduces the I/O contention to physical devices. Finally, we present a performance measurement of QBic to verify its effectiveness.

• Journal of KIISE:Computing Practices and Letters
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• v.15 no.9
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• pp.675-684
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• 2009

Internet worm can cause a traffic problem through DDoS(Distributed Denial of Services) or other kind of attacks. In those manners, it can compromise the internet infrastructure. In addition to this, it can intrude to important server and expose personal information to attacker. However, current detection and response mechanisms to worm have many vulnerabilities, because they only use local characteristic of worm or can treat known worms. In this paper, we propose a new framework to detect unknown worms. It uses macroscopic characteristic of worm to detect unknown worm early. In proposed idea, we define the macroscopic behavior of worm, propose a worm detection method to detect worm flow directly in IP packet networks, and show the performance of our system with simulations. In IP based method, we implement the proposed system and measure the time overhead to execute our system. The measurement shows our system is not too heavy to normal host users.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2007.06a
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• pp.754-757
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• 2007

In this paper, we present an implementation and it's real-sea test of an underwater acoustic data communication system, which allows the system to reduce complexity and increase robustness in time variant underwater environments. For easy adaptation to complicated and time-varying environments of the ocean, all-digital transmitter and receiver systems were implemented. For frame synchronization the CAZAC sequence was used, and QPSK modulation/ demodulation method with carrier frequency of 25kHz and a bandwidth of 5kHz were applied to generate 10kbps transmission rate including overhead. To improve transmission quality, we used several techniques and algorithms such as adaptive beamforming, adaptive equalizer, and convolution coding/Viterbi decoding. for the verification of the system performance, measurement of BER has been done in a very shallow water with depth of 8m at JangMok, Geoje. During the experiment, image data were successfully transmitted up to about 7.4km.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.21 no.3
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• pp.537-542
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• 2017

In this paper, we propose a new scheduling scheme to reduce the complexity and overhead in TDD uplink cellular networks. In a TDD network, users can estimate the interference causing to neighboring BSs by measuring the signals transmitted from them. In the existing max SGIR scheduling scheme, each user calculates SGIR and feeds back to BS. Then, the BS selects a user having the largest SGIR value to transmit data. This scheme has a problem that as the number of BSs increases, the number of interference channels to be measured by the users increases, and thus the hardware and algorithm complexity of the user increases. We propose a max SmGIR (Signal-to-max generating interference ratio) scheduling scheme that can reduce the user complexity by predicting the SGIR value based on only the largest interference information. According to computer simulations, the proposed scheme has similar performance to the existing max SGIR scheme despite this low complexity.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.1 s.343
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• pp.59-64
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• 2006

The slope of the ramp generator in a single slope ADC(analog-to-digital converter) suffers from process and frequency variation. This variation in ramp slope causes ADC gain variation and eventually limits the performance of the ISP(image signal processing) in a CIS(CMOS image sensor) that uses the single slope ADC. This paper proposes a ramp slope BISC(built-in-self-calibration) scheme for CIS. The CIS with proposed BISC was fabricated with a $0.35{\mu}m$ process. The measurement results show that the proposed architecture effectively calibrate the ramp slope against process and clock frequency variation. The silicon area overhead is less than $0.7\%$ of the full chip area.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.4
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• pp.6-13
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• 2011

Due to its robustness to illumination change, normalized cross-correlation based similarity measurement is widely used in many machine vision applications. However, its inefficient computation structure is not adequate for real-time embedded vision system. In this paper, we present an efficient hardware architecture based on a normalized cross correlation (NCC) for fast image similarity measure. The proposed architecture simplifies window-sum process of the NCC using the integral-image. Relieving the overhead to constructing integral image, we make it possible to process integral image construction at the same time that pixel sequences are inputted. Also the proposed segmented integral image method can reduce the buffer size for storing integral image data.

• Journal of the Korean Society for Railway
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• v.14 no.3
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• pp.222-227
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• 2011

The dropper supports the contact wire and is attached using various types of dropper clips on the catenary. Droppers are subject to mechanical stress from buckling during the passage of pantographs. In order to investigate failure causes for the high speed line dropper, theoretical analyses and experiments have been carried out. In this paper, mathematical formulas are derived for the pre-sag of the dropper static load. The measured values in the experiment were similar to the theoretical predictions. To analyze the cause on fracture of dropper wire, we have conducted analysis such as SEM(Scanning Electron Microscope) of fractured specimens in the field and new specimens. Finally, we performed measurement for the variation of dynamic load on the dropper when a pantograph moved at 300km/h under the Korean high speed overhead line. If such mechanical load occur repeatedly with every passing pantograph, it is possible that the dropper wire will break due to fatigue. This results will be used for special management of high speed catenary system maintenance and life estimation of dropper.

• Journal of Communications and Networks
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• v.18 no.6
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• pp.913-925
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• 2016

In-band wireless full-duplex is a promising technology that enables a wireless node to transmit and receive at the same time on the same frequency band. Due to the complexity of self-interference cancellation techniques, only base stations (BSs) are expected to be full-duplex capable while user terminals remain as legacy half-duplex nodes in the near future. In this case, two different nodes share a single subchannel, one for uplink and the other for downlink, which causes inter-node interference between them. In this paper, we investigate the joint problem of subchannel assignment and power allocation in a single-cell full-duplex orthogonal frequency division multiple access (OFDMA) network considering the inter-node interference. Specifically, we consider two different scenarios: i) The BS knows full channel state information (CSI), and ii) the BS obtains limited CSI through channel feedbacks from nodes. In the full CSI scenario, we design sequential resource allocation algorithms which assign subchannels first to uplink nodes and then to downlink nodes or vice versa. In the limited CSI scenario, we identify the overhead for channel measurement and feedback in full-duplex networks. Then we propose a novel resource allocation scheme where downlink nodes estimate inter-node interference with low complexity. Through simulation, we evaluate our approaches for full and limited CSIs under various scenarios and identify full-duplex gains in various practical scenarios.

• Journal of KIISE:Software and Applications
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• v.34 no.8
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• pp.752-762
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• 2007

The PSP (Personal Software Process) is developed to help developers make high-quality products through improving their personal process. With consistent measurement and analysis activity that the PSP suggests, developers can identify process deficiencies and make reliable estimates on effort and quality. However, due to the high-overhead and context-switching problem of manual data recording, developers have difficulties in collecting reliable data, which can lead wrong analysis results. On the other hand, the paper-based process guides of the PSP are inconvenient to navigate its process information and difficult to attach additional information. In this paper, we introduce a PSP supporting tool developed to handle these problems. The tool provides automated data collection facilities to help acquire reliable data, an EPG (Electronic Process Guide) for the PSP to provide easy access and navigation of the process information, and an experience repository to store development experience as additional information about the process.