Journal of the Institute of Electronics Engineers of Korea SD (대한전자공학회논문지SD)

The Institute of Electronics and Information Engineers (대한전자공학회)
권호 표지

Efficient Hardware Architecture for Fast Image Similarity Calculation

고속 영상 유사도 분석을 위한 효율적 하드웨어 구조

  • Kwon, Soon (Daegu Gyeongbuk Institute of Science and Technology) ;
  • Lee, Chung-Hee (Daegu Gyeongbuk Institute of Science and Technology) ;
  • Lee, Jong-Hun (Daegu Gyeongbuk Institute of Science and Technology) ;
  • Moon, Byung-In (School of Electronics Engineering, Kyungpook National University) ;
  • Lee, Yong-Hwan (School of Electronics Engineering, Kumoh National Institute of Technology)
  • Received : 2010.09.03
  • Accepted : 2011.04.04
  • Published : 2011.04.25
Download PDF
⟨ Previous Next ⟩

Abstract

Due to its robustness to illumination change, normalized cross-correlation based similarity measurement is widely used in many machine vision applications. However, its inefficient computation structure is not adequate for real-time embedded vision system. In this paper, we present an efficient hardware architecture based on a normalized cross correlation (NCC) for fast image similarity measure. The proposed architecture simplifies window-sum process of the NCC using the integral-image. Relieving the overhead to constructing integral image, we make it possible to process integral image construction at the same time that pixel sequences are inputted. Also the proposed segmented integral image method can reduce the buffer size for storing integral image data.

정규상호상관 기반의 이미지 유사도 비교방법은 조명차 등에 강인한 특성이 있어 널리 사용되어 왔으나, 비효율적인 연산구조로 인해 실시간 연산을 요구하는 임베디드 시스템과 같은 응용분야에서는 적용하는 데 한계가 있었다. 본 논문에서는 효율적 연산방법을 통해 실시간 이미지 유사도 비교가 가능한 정규상호상관 기반의 하드웨어 연산구조를 제안한다. 제안된 구조는 적분이미지 기반의 윈도우 연산 방법을 사용하여 정규상호상관 함수의 윈도우 영역의 합 연산과정을 효율적으로 처리한다. 이를 위해 화소 입력과 동시에 적분이미지 생성이 가능한 구조와 메모리 효율적인 부분화 적분이미지 방법을 적용하여 적분이미지 생성과정에서의 부담을 최소화 한다.

Keywords

References

  1. C. Heipke, "Overview of image matching techniques", in Proc. of OEEPE Workshop on the Application of Digital Photogrammetric Workstations, OEEPE Official Publications, no. 33, pp.173-189, Mar. 1996.
  2. R. C. Gonzalez and R. E. Woods, "Digital image processing third edition)", Addison-Wesley, 1992.
  3. O. Faugeras, B. Hotz, H. Mathieu, et al., "Real time correlation based stereo: algorithm implementations and applications" Tech. Rep. RR-2013, INRIA, 1993.
  4. P. Nillius and J. Eklundh, "Fast block matching with normalized cross correlation using Walsh Transforms", Technical Report ISRN KTH/NA/P-02/11-SE, Sep. 2002.
  5. J. P. Lewis, "Fast Normalized Cross- Correlation", Online, Internet, Available: www.idiom.com/-zilla/Work/nvisionInterface /nip.pdf
  6. L. Di Stefano and S. Mattoccia, "Fast template matching using bounded partial correlation", Machine Vision and Applications, vol. 13, no. 4, pp. 213-221, Feb. 2003. https://doi.org/10.1007/s00138-002-0070-5
  7. S. -D. Wei and S. -H. Lai, "Fast template matching based on normalized cross correlation with adaptive multilevel winner update", IEEE Transactions on Image Processing, vol. 17, no. 11, pp. 2227-2235, Nov. 2008.
  8. M. J. McDonnell, "Box-filtering Techniques", Computer Graph. Image Process., vol. 17, pp. 65-70, Sep. 1981. https://doi.org/10.1016/S0146-664X(81)80009-3
  9. P. Viola and M. Jones, "Rapid object detection using a boosted cascade of simple features", in Proc. of IEEE Computer Vision and Pattern Recognition, pp. 511-518, Dec. 2001.
  10. D. -M. Tsai and C. -T. Lin, " Fast normalized cross correlation for defect detection", Pattern Recognition Letters, vol. 24, pp. 2625-2631, Nov. 2003. https://doi.org/10.1016/S0167-8655(03)00106-5
  11. X. Wang and X. Wang, "FPGA based parallel architectures for normalized cross-correlation", 1st International Conference on Information Science and Engineering (ICISE), Dec. 2009.
  12. A. Lindoso and L. Entrena, "High performance FPGA-based image correlation", J. Real-Time Image Proc., vol. 2, pp.223-233, Dec. 2007. https://doi.org/10.1007/s11554-007-0066-5
  13. L. D. Stefano, S. Mattoccia and F. Tombari, "Speeding-up NCC-based template matching using parallel multimedia instructions", IEEE International Workshop on Computer Architecture for Machine Perception (CAMP), pp 193-197, Jul. 2005.
  14. Xilinx. Inc, "Virtex-5 FPGA XtreamDSP Design Considerations", http://www.xilinx.com, 2010.