• 제목/요약/키워드: output driver

검색결과 368건 처리시간 0.024초

4-PAM signaling을 이용한 high speed serial link transmitter (High Speed Serial Link Transmitter Using 4-PAM Signaling)

  • 정지경;이정준;범진욱;정영한
    • 대한전자공학회논문지SD
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    • 제46권11호
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    • pp.84-91
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    • 2009
  • 본 논문은 multi-level signaling을 이용한 high speed serial link transmitter에 관하여 제안하였다. High speed serial link에서 수 Gb/s를 달성하기 위해 4-pulse amplitude modulation (PAM) 을 사용하였다. 4-PAM은 4개의 level로 한 symbol time에 2 bit data를 전송함으로써 binary signaling보다 2배 빠른 data 전송이 가능해졌다. 제안된 4-PAM transmitter는 전압 output 대신 전류 output을 생성하며 이로 인해 driver의 switching time이 빨라져서 더 높은 속도의 transmitter를 구현할 수 있었다. $2^5-1$ pseudo-random bit sequence (PRBS) 생성기는 built-in self test (BIST)를 하기 위해 on-chip으로 설계되었다. 본 연구는 동부 하이텍 $0.18{\mu}m$ CMOS 공정을 통하여 설계되었으며 1.8 V supply voltage에서 eye 크기가 160 mV 이고 최대 동작 속도는 8 Gb/s이다. 칩 전체 면적은 $0.7\times0.6mm^2$이며 전력 소모는 98 mW이다.

Single-Electron Logic Cells and SET/FET Hybrid Integrated Circuits

  • Kim, S.J.;Lee, C.K.;Lee, J.U.;Choi, S.J.;Hwang, J.H.;Lee, S.E.;Choi, J.B.;Park, K.S.;Lee, W.H.;Paik, I.B.;Kang, J.S.
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제6권1호
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    • pp.52-58
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    • 2006
  • Single-electron transistor (SET)-based logic cells and SET/FET hybrid integrated circuits have been fabricated on SOI chips. The input-output voltage transfer characteristic of the SET-based complementary logic cell shows an inverting behavior where the output voltage gain is estimated to be about 1.2 at 4.2K. The SET/FET output driver, consisting of one SET and three FETs, yields a high voltage gain of 13 and power amplification with a wide-range output window for driving next circuit. Finally, the SET/FET literal gate for a multi-valued logic cell, comprising of an SET, an FET and a constant-current load, displays a periodic voltage output of high/low level multiple switching with a swing as high as 200mV. The multiple switching functionality of all the fabricated logic circuits could be enhanced by utilizing a side gate incorporated to each SET component to enable the phase control of Coulomb oscillations, which is one of the unique characteristics of the SET-based logic circuits.

A 77 GHz mHEMT MMIC Chip Set for Automotive Radar Systems

  • Kang, Dong-Min;Hong, Ju-Yeon;Shim, Jae-Yeob;Lee, Jin-Hee;Yoon, Hyung-Sup;Lee, Kyung-Ho
    • ETRI Journal
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    • 제27권2호
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    • pp.133-139
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    • 2005
  • A monolithic microwave integrated circuit (MMIC) chip set consisting of a power amplifier, a driver amplifier, and a frequency doubler has been developed for automotive radar systems at 77 GHz. The chip set was fabricated using a 0.15 ${\mu}$ gate-length InGaAs/InAlAs/GaAs metamorphic high electron mobility transistor (mHEMT) process based on a 4-inch substrate. The power amplifier demonstrated a measured small signal gain of over 20 dB from 76 to 77 GHz with 15.5 dBm output power. The chip size is 2mm${\times}$ 2mm. The driver amplifier exhibited a gain of 23 dB over a 76 to 77 GHz band with an output power of 13 dBm. The chip size is 2.1mm${\times}$ 2mm. The frequency doubler achieved an output power of -6 dBm at 76.5 GHz with a conversion gain of -16 dB for an input power of 10 dBm and a 38.25 GHz input frequency. The chip size is 1.2mm ${\times}$ 1.2mm. This MMIC chip set is suitable for the 77 GHz automotive radar systems and related applications in a W-band.

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A dual-path high linear amplifier for carrier aggregation

  • Kang, Dong-Woo;Choi, Jang-Hong
    • ETRI Journal
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    • 제42권5호
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    • pp.773-780
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    • 2020
  • A 40 nm complementary metal oxide semiconductor carrier-aggregated drive amplifier with high linearity is presented for sub-GHz Internet of Things applications. The proposed drive amplifier consists of two high linear amplifiers, which are composed of five differential cascode cells. Carrier aggregation can be achieved by switching on both the driver amplifiers simultaneously and combining the two independent signals in the current mode. The common gate bias of the cascode cells is selected to maximize the output 1 dB compression point (P1dB) to support high-linear wideband applications, and is used for the local supply voltage of digital circuitry for gain control. The proposed circuit achieved an output P1dB of 10.7 dBm with over 22.8 dBm of output 3rd-order intercept point up to 0.9 GHz and demonstrated a 55 dBc adjacent channel leakage ratio (ACLR) for the 802.11af with -5 dBm channel power. To the best of our knowledge, this is the first demonstration of the wideband carrier-aggregated drive amplifier that achieves the highest ACLR performance.

출력전류 제어 기능이 향상된 고휘도 LED 구동 IC 설계 (Design of the High Brightness LED Driver IC with Enhanced the Output Current Control Function)

  • 한석붕;송기남
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2010년도 하계학술대회 논문집
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    • pp.9-9
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    • 2010
  • In this paper, High Brightness LED driver IC using new current sensing circuit is proposed. This LED driver IC can provide a constant current with high current precision over a wide input voltage range. The proposed current-sensing circuit is composed of a cascode current sensor and a current comparator with only one reference voltage. This IC minimizes the voltage stress of the MOSFET from the maximum input voltage and has low power consumption and chip area by using simple-structured comparator and minimum bias current. The LED current ripple of the designed IC is in ${\pm}5%$ and a tolerance of the average LED current is lower than 2.43%. This shows much improved feature than the previous method. Also, protections for input voltage and operating temperature are designed to improve the reliability of the designed IC. Designed LED driver IC uses $1{\mu}m$ X-Fab. BiCMOS process parameters and electrical characteristics and functioning are verified by spectre(Cadence) simulation.

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ABC 확장모형의 개발 및 적용 (Development and Implementation of Extension Models for Activity-Based Costing)

  • 최성운
    • 대한안전경영과학회지
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    • 제16권1호
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    • pp.239-250
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    • 2014
  • The purpose of this research is to implement and develop the Economic Cost Driver Size(ECDS) extended model to determine the optimal cash driver size with measurement complexity cost and allocation fail cost. ECDS model can be used to seek both measurement accuracy and time efficiency of the Activity-Base Costing (ABC). The study also develops Activity Priority Number (APN) to evaluate the importance of nonvalue-added activities improvement and to determine the representative cost driver of value-added activities when applying ECDS model. APN consists of Severity Priority Number (SPN), Undetectablitiy Priority Number (UPN) and Occurrence Priority Number (OPN). APN can be obtained from lower-stream activity, current activity, upper-stream activity in terms of hierarchical dependency of SIPOC (Supplier, Input, Process, Output, and Customer). In order to seek both efficiency of invested capital and reduction of overhead cost, the paper proposes the integrated ABC and Economic Value Added (EVA) model using redesigned ABC-based statement of comprehensive income and EVA-based statement of financial position. For a better understanding of the proposed ABC-EVA integrated model, numerical examples are demonstrated in this paper. Cost drivers of ABC and capital drivers of EVA in the proposed model can be used to reduce activity overhead cost from ABC-based statement of comprehensive income and to lessen activity capital charge from EVA-based statement of financial position.

산업연관분석에 의한 정보통신산업의 경제적 파급효과 (Economic Impacts of Information and Communications Technology Industry In Korea Using Input-Output Tables)

  • 김도환
    • 한국경영과학회지
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    • 제32권3호
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    • pp.81-96
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    • 2007
  • This paper analyses the Korean information and communication technology supply side across the economy using 1995, 2000 and 2003 input-output tables. Input-output analysis considers inter-industry relations in an economy, depicting how the output of one industry goes to another industry where it serves as an input, and thereby makes one industry dependent on another both as customer of output and as supplier of Inputs. It can be evaluated that the recent growth of Korean ICT sector has come from the development of communication service and equipment industry and software industry. Although the high performance and positive revealed comparative advantages in ICT manufacturing sector, the value added and employment in that sector are not satisfactory. It may reflect in part high portion of imported intermediate goods in ICT manufacturing. However, it is fortunate that ICT services, which accounted for relatively high value added, induce the development of ICT manufacturing and follow strong export performance. Moreover, it is expected that the software sector with high value added and employment will be a major driver of ICT growth.

포항가속기연구소 디지탈 전자석 전원장치의 LC 출력필터 (LC output filter for high accuracy and stability digital controlled MPS at PLS)

  • 김성철;하기만;황정연;최진혁
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2005년도 전력전자학술대회 논문집
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    • pp.106-108
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    • 2005
  • High accuracy and stability digital controlled power supply for magnet is developed at PLS. This power supply has three sections. The first section is digital controller including DSP&FPGA and precision ADC, the second section consists of IGBT driver and four quad IGBT switch, and the third section is LC output filter section. AC input voltage of power supply is 3-phase 21V, output current is 0 ${\sim}$ 150 A dc. Switching frequency of four quad IGBT switch is 25 kHz. The output current of power supply has very high accuracy of 100 A step resolution at full range and the stability of +/- 1.5 ppm for short term and +/- 5 ppm for long term. This paper describes characteristics of filter and output current performance improvement after LC output filter at four quad digital power supplies.

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The Output Ripple Current of Single-Stage Flyback Converter with High Power Factor in LED Driver

  • Park, In-Ki;Eom, Hyun-Chul
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2013년도 전력전자학술대회 논문집
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    • pp.347-349
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    • 2013
  • This paper describes analysis and calculation of line frequency ripple current according to output capacitor value and effects of LED connection in the single stage flyback converter with high power factor. The low frequency output ripple current delivered from single stage converter has been analyzed in detail and the method evaluating parasitic resistance included in LED has been provided. In order to verify the equation derived in this paper, the single stage flyback converter has been designed with constant output current regulation with DCM operation. Experiments were conducted with different LED load structures to analyze the effect of LED parasitic resistance on output ripple current. As test results, the calculation can provide guide line to select capacitor values depending on output ripple current and LED characteristics.

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2상 스테핑 모터 드라이버의 성능개선 (Performance Improvement of Stepping Motor Driver)

  • 김일환;오태석
    • 산업기술연구
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    • 제24권A호
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    • pp.91-97
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    • 2004
  • This paper describes the design of a 2-phase stepping motor driver using CPLD(Complex Programmable Logic Device). The driver IC such as L297(SGS-Thomson Microelectronics), which is mostly used has some difficulties in PWM control because of the switching noise of power MOSFETs. It causes current ripple and acoustic noise. To improve theses characteristics, we proposed a new current control method that the output PWM frequency is almost constant using a digital filter. Also we proposed constant current method for 1-2 phase(half step) excitation. The proposed method is implemented with CPLD(Xilinx, XC9572-PC44). Experimental results show the effectiveness of the proposed method.

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