• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.15 no.4
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• pp.335-344
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• 2004

A low phase noise EQM(Engineering Qualified Model) LO(Local Oscillator) has been developed for Ka-band satellite transponder. A VCDRO(Voltage Controlled Dielectric Resonator Oscillator) is also designed using a high impedance inverter coupled with dielectric resonator to improve the phase noise performances out of the loop bandwidth. The mechanical analysis fur housing and the thermal analysis fur circuit board are achieved. This EQM LO is applied to Ka-band satellite transponder of EQM level after environmental experiments for space application. The LO has the harmonic suppression characteristics above 52 ㏈c and requires low power consumption under 1.3 watts. The phase noise characteristics are exhibited as -101.33 ㏈c/㎐ at 10 ㎑ offset frequency and -114.33 ㏈c/㎐ at 100 ㎑ offset frequency, with the output power of 14.0 ㏈m${\pm}$0.17 ㏈ over the temperature range of -15∼＋65$^{\circ}C$.

• IEIE Transactions on Smart Processing and Computing
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• v.4 no.3
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• pp.158-162
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• 2015

A low phase noise CMOS voltage controlled oscillator(VCO) for multi-band/multi-standard RF Transceivers is presented. For both wide tunability and low phase noise characteristics, Hybrid inductor which uses both bondwire inductor and planar spiral inductor in the same area, is proposed. This approach reduces inductance variation and presents high quality factor without custom-designed single-turn inductor occupying large area, which improves phase noise and tuning range characteristics without additional area loss. An LC VCO is designed in a 0.13um CMOS technology to demonstrate the hybrid inductor concept. The measured phase noise is -121dBc/Hz at 400KHz offset and -142dBc/Hz at 3MHz offset from a 900MHz carrier frequency after divider. The tuning range of about 28%(3.15 to 4.18GHz) is measured. The VCO consumes 7.5mA from 1.3V supply and meets the requirements for GSM/EDGE and WCDMA standard.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• v.9 no.2
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• pp.903-905
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• 2005

Theoretical expressions are introduced to achieve low phase-noise ring oscillators. Understanding of the relations between the phase-noise and the design parameters leads to the reduction of the phase-noise at the stage of the circuit design. Using expressions from reference, ways of reducing the phase noise are suggested.

• Proceedings of the KIEE Conference
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• 2003.07c
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• pp.1955-1957
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• 2003

This paper presents a novel defected ground structure (DGS) and its application to a microwave oscillator. The presented oscillator is designed so as to use the suggested defected ground structure as a feedback loop inducing a negative resistance as well as a frequency-selective circuit. Applying the feedback loop between the drain and the gate of a FET device produces precise phase conversion in the feedback loop. The equivalent circuit parameters of the DGS are extracted by using a three-dimensional EM calculations and simple circuit analysis method. The implemented 1.07 GHz oscillator exhibits 0 dBm output power with over 15% dc-to-RF power efficiency and -106 dBc/Hz phase noise at 100 kHz offset from carrier.

• Proceedings of the IEEK Conference
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• 2000.11a
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• pp.385-388
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• 2000

In this paper, the Ka-band Dielectric resonator oscillator has been designed and fabricated. The resonator network was simulated using HFSS program. The design method of an oscillator is the small-signal S-parameter design. The Push-push DRO employs a hetero junction FET (NE32484A). The fabricated Push-push DRO shows such characteristics as the phase noise -106 ㏈c/Hz at the 100 ㎑ frequency offset. the output power and fundamental frequency surpression were -6 ㏈m and -29 ㏈c, respectively.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.8 no.4
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• pp.886-893
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• 2004

In this paper, active resonator oscillator using active band pass filter with gain, active resonator with negative resistance using transistor(agilent ATF-34143) is designed and fabricated. Proposed active resonator oscillator for local oscillator in ISM band(5.8GHz) is designed with 5.5 GHz oscillation frequency. Designed active resonator oscillator implemented on the substrate which has the relative dielectric constant of 3.38, the height of 0.508mm, and metal thickness of 0.018mm. Active resonator oscillators using active band pass filter with gain show the oscillation frequency of 5.6GHz with the output power of -2dBm and phase noise of -81dBc/Hz at the offset frequency of 100kHz. Active resonator oscillators active resonator with negative resistance show the oscillation frequency of 5.6, 5.8GHz with the output power of -4dBm and phase noise of -91dBc/Hz at the offset frequency of 100kHz.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.26 no.12C
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• pp.268-272
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• 2001

In this thesis, PLVCO(Phase Locked Voltage Controlled Oscillator) using 24.42 GHz voltage controlled hair-pin resonator oscillator, Sequency divider, buffer amplifier, -10 dB directional coupler and phase detector is designed and fabricated for B-WLL. The PLVCO shows the oscillator output power of 16.5 dBm at 24.42 GHz, and phase noise of -76.3 dBc/Hz at 1001:Hz offset, -72.8dBc/Hz at 10 kHz offset from fundamental frequency.

• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.3 no.1 s.4
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• pp.13-19
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• 2004

The VCO(Voltage Controlled Oscillator) with low phase noise and high reliability is implemented using nonlinear design, and its phase noise characteristics are compared with that of Lesson's equation. The microstripline coupled with dielectric resonator is realized as a high impedance inverter to improve the phase noise, and the qualify factor of resonator circuit can be transferred to active device with the enhanced the loaded quality factor. The worst case and part stress analyses are achieved to obtain the high reliability of VCO. The developed VCO has the oscillating tuning factor of 0.56MHz/V for the control voltage range of 0$\~$12V This VCO requires the DC power of 160mW. The phase noise characteristics exhibit good performances of -96.51dBc/Hz @ 10KHz and -116.3dBc/Hz @ 100KHz, respectively. And, the output power of 7.33 dBm is measured.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.9 no.2
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• pp.408-414
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• 2005

The VCDRO(Voltage Controlled Dielectric Resonate. Oscillator) with low phase noise is designed using nonlinear analysis, and its phase noise characteristics are compared with that of Lesson's equation. The microstripline coupled with dielectric resonator is realized as a high impedance inverter to improve the phase noise performance, and the quality factor of resonator circuit can be transferred to active device with the enhanced the loaded quality factor. The worst case and part stress analyses are achieved to obtain the high reliability of VCDRO and the reliability analysis is accomplished to estimate the probability of operation at the end of life. The developed VCDRO has the oscillating tuning factor of 0.56MHZ1V for the control voltage range of 0-l2V. This VCDRO requires the DC power of 136mW. The phase noise characteristics exhibit good performances of -94.18dBc/Hz (a)10KHz and -116.3dBc/Hz (a)100KHz. And, the output power over 7.33dBm is measured.

• Proceedings of the KIEE Conference
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• 1999.07g
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• pp.3181-3183
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• 1999

A CMOS two-stage oscillator applicable to requiring in- and quadrature-phase components such as RF and data retiming applications are presented using phase-look-ahead technique. This paper clearly describes the operation principle of the presented two-stage oscillator and the principle can be also applicable to the high speed high speed divide-by-two is usually used for prescaler of the frequency synthesizer. Also, the sucessful oscillation of the proposed oscillator using PLA is confirmed through the experiment. The test vehicle is designed using 0.8 ${\mu}m$ N-well CMOS process and it has a maximum 914MHz oscillation showing -75dBclHz phase noise at 100kHz offset with single 2V supply.